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AJvYcCUtSPquZgjfP85YYgazzBIafveU4CVuWefgtySy1TlkStwM7vfKxQC4brDHFkmzf2SwHbh1mtUWBfNB@vger.kernel.org, AJvYcCXq4k/4jmzhHKRRVbmcK0zg/Xx+3mqWvYSn0L6mLC9poUnk4PIMHGdGVoLMYv0S+O2oy4p8FUA47ipzsqg=@vger.kernel.org X-Gm-Message-State: AOJu0Yx85+JVVKjAGM7gClGiGaL/um8jL1oC1lITrBpJYJlOgBTtyri8 f5cVXH5CNwJr7YIl6G8ZURIUnREVIFlGPEOovMCUxMc60InkU00V X-Google-Smtp-Source: AGHT+IGnOE1PkuJ43LcTPjeXi2C2x9LNLJ7CXghQEGyH3H8ugrmPXFYmzovWXocaLxC2O3Rw0JOsQQ== X-Received: by 2002:a05:6a00:3e25:b0:71e:6489:d06 with SMTP id d2e1a72fcca58-71e6489127amr15417757b3a.0.1729079371988; Wed, 16 Oct 2024 04:49:31 -0700 (PDT) Received: from localhost.localdomain ([113.30.217.221]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71e773ea9f2sm2968702b3a.95.2024.10.16.04.49.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Oct 2024 04:49:31 -0700 (PDT) From: Anand Moon To: Shawn Lin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , linux-pci@vger.kernel.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-rockchip@lists.infradead.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list) Cc: Anand Moon Subject: [PATCH v9 0/3] PCIe RK3399 clock and reset using new helper functions Date: Wed, 16 Oct 2024 17:19:05 +0530 Message-ID: <20241016114915.2823-1-linux.amoon@gmail.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Following changes are used to reduce the code and used new clk_bulk()* API d reset_control_bulk()* API helper functions. Additional to the PCie core controller changes added some new PHY changes to help improve and clean up the code. Made lots of silly mistakes, will try to improve in the future. Thanks -Anand Previous changes. v7: https://lore.kernel.org/all/20241012050611.1908-2-linux.amoon@gmail.com/ v6: https://lore.kernel.org/r/20241006182445.3713-2-linux.amoon@gmail.com/ v5: https://lore.kernel.org/all/20240901183221.240361-2-linux.amoon@gmail.com/ V4: https://lore.kernel.org/all/20240625104039.48311-1-linux.amoon@gmail.com/ V3: https://lore.kernel.org/all/20240622061845.3678-1-linux.amoon@gmail.com/ V2: https://lore.kernel.org/all/20240621064426.282048-1-linux.amoon@gmail.com/ V1: https://lore.kernel.org/all/20240618164133.223194-2-linux.amoon@gmail.com/ *** BLURB HERE *** Anand Moon (3): PCI: rockchip: Simplify clock handling by using clk_bulk*() function PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function PCI: rockchip: Refactor rockchip_pcie_disable_clocks() function signature drivers/pci/controller/pcie-rockchip.c | 222 +++++-------------------- drivers/pci/controller/pcie-rockchip.h | 35 ++-- 2 files changed, 60 insertions(+), 197 deletions(-) base-commit: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2