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Thu, 17 Oct 2024 15:35:56 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 17 Oct 2024 08:35:53 -0700 From: Krishna chaitanya chundru Subject: [PATCH v6 0/2] PCI: Enable runtime pm of the host bridge Date: Thu, 17 Oct 2024 21:05:49 +0530 Message-ID: <20241017-runtime_pm-v6-0-55eab5c2c940@quicinc.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIANUuEWcC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyzHQUlJIzE vPSU3UzU4B8JSMDIxNDA0Mz3aLSvJLM3NT4glzdFOOUpDQTQ3NjsyQzJaCGgqLUtMwKsGHRsbW 1AK6aYf1cAAAA To: Kevin Xie , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , "Rob Herring" , Bjorn Helgaas CC: , , , , , , , "Krishna chaitanya chundru" X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729179352; l=3234; i=quic_krichai@quicinc.com; s=20230907; h=from:subject:message-id; bh=rMoVbOjsdNs0tgHS8GhSs7UqgJqZFwlqgjMCdaHfD0Y=; b=oUXU5+9za95j1TPaIXGXO2D+zRkgft4JNt6mTOm24KUuO3menvWTUwiikZnL1TKTUelI6iAQu 3QPnMHyEAQcDQsmmYb603S1lWhc8FwxXKKbhRYz03qXcogZyguFkvik X-Developer-Key: i=quic_krichai@quicinc.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: UMI6oOzJs1esLZN00Z8vIQku21nwrkJy X-Proofpoint-ORIG-GUID: UMI6oOzJs1esLZN00Z8vIQku21nwrkJy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=987 phishscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 clxscore=1011 spamscore=0 suspectscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410170107 It is a property of the runtime PM framework that it can only follow continuous dependency chains. That is, if there is a device with runtime PM disabled in a dependency chain, runtime PM cannot be enabled for devices below it and above it in that chain both at the same time. Since runtime PM is disabled for host bridge, the state of the child devices under the host bridge is not taken into account by PM framework for the top level parent, PCIe controller. So PM framework, allows the controller driver to enter runtime PM irrespective of the state of the devices under the host bridge. So enable runtime pm of the host bridge device, so that dependency chain in maintained between endpoint devices and the controller driver. PM framework expectes parent runtime pm enabled before enabling runtime pm of the child. As PCIe starfive device is enabling runtime pm after the pci_host_probe which enables runtime pm of the child device i.e for the bridge device a warning is shown saying "pcie-starfive 940000000.pcie: Enabling runtime PM for inactive device with active children" and also shows possible circular locking dependency detected message. As it is must to enable parent device's runtime PM before enabling child's runtime pm as the pcie-starfive device runtime pm is enabled after child runtime starfive device is seeing the warning. In the first patch fix the pcie-starfive driver by enabling runtime pm before calling pci_host_probe(). All other PCIe controller drivers are enabling runtime pm before calling pci_host_probe() which is as expected so don't require any fix like pcie-starfive driver. Signed-off-by: Krishna chaitanya chundru --- Changes in v6: - include the patch by mayank which fixes runtime pm enable order for pcie starfive driver. Changes in v5: - call pm_runtime_no_callbacks() as suggested by Rafael. - include the commit texts as suggested by Rafael. - Link to v4: https://lore.kernel.org/linux-pci/20240708-runtime_pm-v4-1-c02a3663243b@quicinc.com/ Changes in v4: - Changed pm_runtime_enable() to devm_pm_runtime_enable() (suggested by mayank) - Link to v3: https://lore.kernel.org/lkml/20240609-runtime_pm-v3-1-3d0460b49d60@quicinc.com/ Changes in v3: - Moved the runtime API call's from the dwc driver to PCI framework as it is applicable for all (suggested by mani) - Updated the commit message. - Link to v2: https://lore.kernel.org/all/20240305-runtime_pm_enable-v2-1-a849b74091d1@quicinc.com Changes in v2: - Updated commit message as suggested by mani. - Link to v1: https://lore.kernel.org/r/20240219-runtime_pm_enable-v1-1-d39660310504@quicinc.com --- Krishna chaitanya chundru (1): PCI: Enable runtime pm of the host bridge Mayank Rana (1): PCI: starfive: Enable PCIe controller's runtime PM before probing host bridge drivers/pci/controller/plda/pcie-starfive.c | 10 +++++++--- drivers/pci/probe.c | 5 +++++ 2 files changed, 12 insertions(+), 3 deletions(-) --- base-commit: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2 change-id: 20241016-runtime_pm-d3dbf41736b6 Best regards,