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Sat, 16 Nov 2024 22:00:31 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sat, 16 Nov 2024 14:00:24 -0800 From: Krishna chaitanya chundru Subject: [PATCH 0/3] PCI: dwc: Add ECAM support with iATU configuration Date: Sun, 17 Nov 2024 03:30:17 +0530 Message-ID: <20241117-ecam-v1-0-6059faf38d07@quicinc.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAPEVOWcC/zXMQQ7CIBCF4as0sxbDlCqJK+/RdNGOg51FQUGJp uHuYo3L/+XlWyFxFE5walaInCVJ8DVw1wDNo7+ykkttaHXbocajYhoXNaE7OJ7IkSGo11tkJ6+ N6Yfas6RHiO9Nzfhd/4D9ARmVVsYa7pDQtpM+359C4mlPYYGhlPIBZznOOpoAAAA= To: , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jingoo Han , "Manivannan Sadhasivam" , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas CC: , , , , , , , , , , , Krishna chaitanya chundru X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731794424; l=2484; i=quic_krichai@quicinc.com; s=20230907; h=from:subject:message-id; bh=66QrEb+eTUbvvgt8hveUhJrPhRZIfy2WvS7z62h6HF4=; b=RK2/2BWM65Rz2Y+c+RNrbnHt6LwtL5085wjS5TzpIN/Ab/ik0vhZySukU4hxtGugf/CumWlQa u+f1QCeoCEEAfYNAHCMqDEIJinhbzDC0Gcpb6pL4w9u2qtlq99GG/IV X-Developer-Key: i=quic_krichai@quicinc.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: JuysSIYxepgnWMlhLeok3cDHrprbj_rf X-Proofpoint-GUID: JuysSIYxepgnWMlhLeok3cDHrprbj_rf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 suspectscore=0 adultscore=0 mlxlogscore=999 phishscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411160192 The current implementation requires iATU for every configuration space access which increases latency & cpu utilization. Configuring iATU in config shift mode enables ECAM feature to access the config space, which avoids iATU configuration for every config access. Add cfg_shft_mode into struct dw_pcie_ob_atu_cfg to enable config shift mode. As DBI comes under config space, this avoids remapping of DBI space separately. Instead, it uses the mapped config space address returned from ECAM initialization. Change the order of dw_pcie_get_resources() execution to acheive this. Introduce new ecam_init() function op for the clients to use configure after ecam init has done. Enable the ECAM feature if the config space size is equal to size required to represent number of buses in the bus range property. The ELBI and iATU registers also fall after the DBI space, so use the cfg win returned from the ecam init to map these regions instead of doing the ioremap again. iATU starts after 4KB of dbi address and ELBI starts at offset 0xf20 from dbi. On bus 0, we have only the root complex. Any access other than that should not go out of the link and should return all F's. Since the IATU is configured for bus 1 onwards, block the transactions for bus 0:0:1 to 0:31:7 (i.e., from dbi_base + 4KB to dbi_base + 1MB) from going outside the link through ecam blocker through parf registers. Increase the configuration size to 256MB as required by the ECAM feature and also move config space, dbi, iatu to upper space and use lower space entirely for BAR region. Signed-off-by: Krishna chaitanya chundru --- --- Krishna chaitanya chundru (3): arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature PCI: dwc: Add ECAM support with iATU configuration PCI: qcom: Enable ECAM feature based on config size arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 +-- drivers/pci/controller/dwc/pcie-designware-host.c | 114 ++++++++++++++++++---- drivers/pci/controller/dwc/pcie-designware.c | 2 +- drivers/pci/controller/dwc/pcie-designware.h | 6 ++ drivers/pci/controller/dwc/pcie-qcom.c | 104 +++++++++++++++++++- 5 files changed, 208 insertions(+), 30 deletions(-) --- base-commit: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2 change-id: 20241016-ecam-b1f5febcfc3c Best regards,