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Mon, 10 Mar 2025 06:31:08 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 52A6V8PY011070; Mon, 10 Mar 2025 06:31:08 GMT Received: from cse-cd02-lnx.ap.qualcomm.com (cse-cd02-lnx.qualcomm.com [10.64.75.246]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTPS id 52A6V709011067 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Mar 2025 06:31:08 +0000 Received: by cse-cd02-lnx.ap.qualcomm.com (Postfix, from userid 4438065) id 7042D27C6; Mon, 10 Mar 2025 14:31:06 +0800 (CST) From: Ziyue Zhang To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org, konradybcio@kernel.org, dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org, abel.vesa@linaro.org Cc: quic_ziyuzhan@quicinc.com, quic_qianyu@quicinc.com, quic_krichai@quicinc.com, johan+linaro@kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH v4 0/8] pci: qcom: Add QCS8300 PCIe support Date: Mon, 10 Mar 2025 14:30:55 +0800 Message-Id: <20250310063103.3924525-1-quic_ziyuzhan@quicinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: _NaMtD_mFuwSwvtEmGUGB9iCP8_BpM5t X-Proofpoint-ORIG-GUID: _NaMtD_mFuwSwvtEmGUGB9iCP8_BpM5t X-Authority-Analysis: v=2.4 cv=C5sTyRP+ c=1 sm=1 tr=0 ts=67ce872e cx=c_pps a=nuhDOHQX5FNHPW3J6Bj6AA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=Vs1iUdzkB0EA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=QyXUC8HyAAAA:8 a=Rx9dfpPETavtrPkqVs0A:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-10_02,2025-03-07_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 phishscore=0 adultscore=0 clxscore=1011 bulkscore=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 suspectscore=0 spamscore=0 priorityscore=1501 mlxlogscore=703 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2503100049 This series adds document, phy, configs support for PCIe in QCS8300. The series depend on the following devicetree. PCIe SMMU: https://lore.kernel.org/all/20250206-qcs8300-pcie-smmu-v1-1-8eee0e3585bc@quicinc.com/ Have follwing changes: - Document the QMP PCIe PHY on the QCS8300 platform. - Add dedicated schema for the PCIe controllers found on QCS8300. - Add compatible for qcs8300 platform. - Add configurations in devicetree for PCIe0, including registers, clocks, interrupts and phy setting sequence. - Add configurations in devicetree for PCIe1, including registers, clocks, interrupts and phy setting sequence. Signed-off-by: Krishna chaitanya chundru Signed-off-by: Ziyue Zhang --- Changes in v4: - Add received tag - Fixed compile error found by kernel test robot - Link to v3: https://lore.kernel.org/lkml/202412211301.bQO6vXpo-lkp@intel.com/T/#mdd63e5be39acbf879218aef91c87b12d4540e0f7 Changes in v3: - Add received tag(Rob & Dmitry) - Update pcie_phy in gcc node to soc dtsi(Dmitry & Konrad) - remove pcieprot0 node(Konrad & Mani) - Fix format comments(Konrad) - Update base-commit to tag: next-20241213(Bjorn) - Corrected of_device_id.data from 1.9.0 to 1.34.0. - Link to v2: https://lore.kernel.org/all/20241128081056.1361739-1-quic_ziyuzhan@quicinc.com/ Changes in v2: - Fix some format comments and match the style in x1e80100(Konrad) - Add global interrupt for PCIe0 and PCIe1(Konrad) - split the soc dtsi and the platform dts into two changes(Konrad) - Link to v1: https://lore.kernel.org/all/20241114095409.2682558-1-quic_ziyuzhan@quicinc.com/ Ziyue Zhang (8): dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the QCS8300 QMP PCIe PHY Gen4 x2 phy: qcom-qmp-pcie: add dual lane PHY support for QCS8300 dt-bindings: PCI: qcom,pcie-sa8775p: document qcs8300 PCI: qcom: Add QCS8300 PCIe support arm64: dts: qcom: qcs8300: enable pcie0 arm64: dts: qcom: qcs8300: enable pcie0 interface arm64: dts: qcom: qcs8300: enable pcie1 arm64: dts: qcom: qcs8300: enable pcie1 interface .../bindings/pci/qcom,pcie-sa8775p.yaml | 7 +- .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 2 + arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 80 +++++ arch/arm64/boot/dts/qcom/qcs8300.dtsi | 289 +++++++++++++++++- drivers/pci/controller/dwc/pcie-qcom.c | 1 + drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 89 ++++++ 6 files changed, 465 insertions(+), 3 deletions(-) base-commit: cd3215bbcb9d4321def93fea6cfad4d5b42b9d1d