From patchwork Sun Jan 15 08:20:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Wunner X-Patchwork-Id: 13102172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE440C3DA78 for ; Sun, 15 Jan 2023 08:22:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229599AbjAOIWq (ORCPT ); Sun, 15 Jan 2023 03:22:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229822AbjAOIWp (ORCPT ); Sun, 15 Jan 2023 03:22:45 -0500 Received: from mailout3.hostsharing.net (mailout3.hostsharing.net [176.9.242.54]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3EDA1B45A for ; Sun, 15 Jan 2023 00:22:41 -0800 (PST) Received: from h08.hostsharing.net (h08.hostsharing.net [IPv6:2a01:37:1000::53df:5f1c:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "*.hostsharing.net", Issuer "RapidSSL Global TLS RSA4096 SHA256 2022 CA1" (verified OK)) by mailout3.hostsharing.net (Postfix) with ESMTPS id 0D3A0101E6B2D; Sun, 15 Jan 2023 09:22:22 +0100 (CET) Received: from localhost (unknown [89.246.108.87]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by h08.hostsharing.net (Postfix) with ESMTPSA id 9A8D1603DB87; Sun, 15 Jan 2023 09:22:11 +0100 (CET) X-Mailbox-Line: From 9f5ff00e1593d8d9a4b452398b98aa14d23fca11 Mon Sep 17 00:00:00 2001 Message-Id: From: Lukas Wunner Date: Sun, 15 Jan 2023 09:20:30 +0100 Subject: [PATCH v2 0/3] PCI reset delay fixes To: Bjorn Helgaas , linux-pci@vger.kernel.org Cc: Keith Busch , Ashok Raj , Sathyanarayanan Kuppuswamy , Ravi Kishore Koppuravuri , Mika Westerberg , Sheng Bi , Stanislav Spassov , Yang Su Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Delay fixes for recovery from Secondary Bus Resets and Downstream Port Containment, v2: Changes v1 -> v2: * [PATCH 1/3] PCI/PM: Observe reset delay irrespective of bridge_d3 * Add Reviewed-by tags (Mika, Sathyanarayanan) * [PATCH 2/3] PCI: Unify delay handling for reset and resume * Introduce PCI_RESET_WAIT macro for 1 sec timeout prescribed by PCIe r6.0 sec 6.6.1 (Bjorn) * Note in kernel-doc of pci_bridge_wait_for_secondary_bus() that timeout parameter is in milliseconds (Bjorn) * Add Reviewed-by tags (Mika, Sathyanarayanan) * [PATCH 3/3] PCI/DPC: Await readiness of secondary bus after reset * Move PCIE_RESET_READY_POLL_MS macro below the newly introduced PCI_RESET_WAIT from patch [2/3] and extend its code comment * Mention errors seen on Ponte Vecchio in commit message (Bjorn) * Avoid first person plural in commit message (Sathyanarayanan) * Add Reviewed-by tag (Mika) Link to v1: https://lore.kernel.org/linux-pci/cover.1672511016.git.lukas@wunner.de/ Lukas Wunner (3): PCI/PM: Observe reset delay irrespective of bridge_d3 PCI: Unify delay handling for reset and resume PCI/DPC: Await readiness of secondary bus after reset drivers/pci/pci-driver.c | 2 +- drivers/pci/pci.c | 59 +++++++++++++++++----------------------- drivers/pci/pci.h | 16 ++++++++++- drivers/pci/pcie/dpc.c | 4 +-- 4 files changed, 43 insertions(+), 38 deletions(-)