From patchwork Mon May 1 12:06:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Wunner X-Patchwork-Id: 9706439 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E786B60387 for ; Mon, 1 May 2017 12:09:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D8494223B2 for ; Mon, 1 May 2017 12:09:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CBC2F2807B; Mon, 1 May 2017 12:09:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40CBA223B2 for ; Mon, 1 May 2017 12:09:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423551AbdEAMJO (ORCPT ); Mon, 1 May 2017 08:09:14 -0400 Received: from mailout3.hostsharing.net ([176.9.242.54]:48289 "EHLO mailout3.hostsharing.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423525AbdEAMJO (ORCPT ); Mon, 1 May 2017 08:09:14 -0400 Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mailout3.hostsharing.net (Postfix) with ESMTPS id B2CBF101E9E9B; Mon, 1 May 2017 14:09:13 +0200 (CEST) Received: from localhost (5-38-90-81.adsl.cmo.de [81.90.38.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by h08.hostsharing.net (Postfix) with ESMTPSA id 8B37F603E052; Mon, 1 May 2017 14:09:09 +0200 (CEST) X-Mailbox-Line: From 034551c3f3a60caf8b1f8b2a2abaf7bb3e0696a5 Mon Sep 17 00:00:00 2001 Message-Id: <034551c3f3a60caf8b1f8b2a2abaf7bb3e0696a5.1493631639.git.lukas@wunner.de> In-Reply-To: References: From: Lukas Wunner Date: Mon, 1 May 2017 14:06:39 +0200 Subject: [PATCH 2/5] PCI: pciehp: Remain in D0 while awaiting command completion To: Bjorn Helgaas , linux-pci@vger.kernel.org, Ashok Raj , Yinghai Lu Cc: "Rafael J. Wysocki" , Mika Westerberg , Erik Veijola , Keith Busch , Krishna Dhulipala , Wei Zhang Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hotplug controllers may signal an interrupt after a command written to the Slot Control register completes (PCIe r3.1, sec 6.7.3.2). If the controller happens to be in D3hot and is PME capable, this Command Complete interrupt triggers a wakeup to D0 because: (a) PME is the only valid operation that can be initiated by the function when in D3hot (PCI PM r1.2, table 5-4, though Thunderbolt controllers do not adhere to this rule). (b) Hotplug events (including command completion) occurring in D3hot cause "generation of a wakeup event (using the PME mechanism)" (PCIe r3.1, sec 6.7.3.4). When writing to the Slot Control register, we've resumed the controller to D0 (see the call sites of pcie_write_cmd and pcie_write_cmd_nowait). It's silly to let it go to D3hot afterwards if we know that it will be resumed to D0 once the command completes. Thus, hold a runtime PM ref while awaiting command completion. In the "nowait" case, schedule runtime suspend after 1 second, which is the time limit for execution of commands (PCIe r3.1, sec 6.7.3.2). Cc: Rafael J. Wysocki Cc: Mika Westerberg Cc: Erik Veijola Cc: Ashok Raj Cc: Keith Busch Cc: Yinghai Lu Cc: Krishna Dhulipala Cc: Wei Zhang Signed-off-by: Lukas Wunner --- drivers/pci/hotplug/pciehp_hpc.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 026830a138ae..143e2143d62e 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include @@ -201,6 +202,7 @@ static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd, slot_ctrl |= (cmd & mask); ctrl->cmd_busy = 1; smp_mb(); + pm_runtime_get_sync(&pdev->dev); pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl); ctrl->cmd_started = jiffies; ctrl->slot_ctrl = slot_ctrl; @@ -209,8 +211,13 @@ static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd, * Optionally wait for the hardware to be ready for a new command, * indicating completion of the above issued command. */ - if (wait) + if (wait) { pcie_wait_cmd(ctrl); + pm_runtime_put(&pdev->dev); + } else { + pm_runtime_put_noidle(&pdev->dev); + pm_schedule_suspend(&pdev->dev, 1000); + } out: mutex_unlock(&ctrl->ctrl_lock);