From patchwork Wed Jan 23 12:28:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 2024841 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 2448C3FE4F for ; Wed, 23 Jan 2013 12:28:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755549Ab3AWM2y (ORCPT ); Wed, 23 Jan 2013 07:28:54 -0500 Received: from szxga01-in.huawei.com ([119.145.14.64]:1050 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755387Ab3AWM2x (ORCPT ); Wed, 23 Jan 2013 07:28:53 -0500 Received: from 172.24.2.119 (EHLO szxeml214-edg.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.4-GA FastPath queued) with ESMTP id AWP19032; Wed, 23 Jan 2013 20:28:48 +0800 (CST) Received: from SZXEML423-HUB.china.huawei.com (10.82.67.162) by szxeml214-edg.china.huawei.com (172.24.2.29) with Microsoft SMTP Server (TLS) id 14.1.323.7; Wed, 23 Jan 2013 20:28:26 +0800 Received: from localhost (10.135.76.69) by szxeml423-hub.china.huawei.com (10.82.67.162) with Microsoft SMTP Server id 14.1.323.7; Wed, 23 Jan 2013 20:28:22 +0800 From: Yijing Wang To: Rob Landley , Bjorn Helgaas CC: , , Jon Mason , , Andrew Murray , Hanjun Guo , , Yijing Wang Subject: [Update][PATCH] PCI: Document PCIE BUS MPS parameters Date: Wed, 23 Jan 2013 20:28:12 +0800 Message-ID: <1358944092-28884-1-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 MIME-Version: 1.0 X-Originating-IP: [10.135.76.69] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Document PCIE BUS MPS parameters pcie_bus_tune_off, pcie_bus_safe, pcie_bus_peer2peer, pcie_bus_perf into Documentation/kernel-parameters.txt. These parameters were introduced by Jon Mason at commit 5f39e6705 and commit b03e7495a8. Document these into kernel-parameters.txt can help users to understand and use the parameters. Signed-off-by: Yijing Wang --- Documentation/kernel-parameters.txt | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 363e348..1fb269b 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -2227,6 +2227,21 @@ bytes respectively. Such letter suffixes can also be entirely omitted. This sorting is done to get a device order compatible with older (<= 2.4) kernels. nobfsort Don't sort PCI devices into breadth-first order. + pcie_bus_tune_off Disable PCI-E MPS turning and using + the BIOS configured MPS defaults. + pcie_bus_safe Use the smallest common denominator MPS + of the entire tree below a root complex for every device + on that fabric. Can avoid inconsistent mps problem caused + by hotplug. + pcie_bus_perf Configure pcie device MPS to the largest allowable + MPS based on its parent bus. And also set MRRS to the + largest supported value but cannot be configured larger + than the MPS the device or the bus can support for Max + performance. + pcie_bus_peer2peer Make the system wide MPS the smallest + possible value (128B).This configuration could prevent it + from working by having the MPS on one root port different + than the MPS on another. cbiosize=nn[KMG] The fixed amount of bus space which is reserved for the CardBus bridge's IO window. The default value is 256 bytes.