From patchwork Wed Mar 6 05:59:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Xiong" X-Patchwork-Id: 2223271 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 99812DF23A for ; Wed, 6 Mar 2013 05:59:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752732Ab3CFF7w (ORCPT ); Wed, 6 Mar 2013 00:59:52 -0500 Received: from sabertooth01.qualcomm.com ([65.197.215.72]:51936 "EHLO sabertooth01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752536Ab3CFF7w (ORCPT ); Wed, 6 Mar 2013 00:59:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1362549592; x=1394085592; h=from:to:cc:subject:date:message-id:mime-version; bh=oVbv4w9EegUsEQSQEPIt3W4g8sDCCxQTDjNWMenhdk8=; b=P/H6DWr29SpL89bXKYY8bKEjfDQS811Qh1i0TUeR28d36DXYr/ph4wWB 8ImO0PuLeFkR7y300DWM7DDE/iV01G7r3mzYioneNG6dY2/b6T69vNse4 1DFJxfCHn1bxb7X7EurmEkV3Q77Xj3drJfds/Sns2Ik+nmH0y/uOYjUps 8=; X-IronPort-AV: E=Sophos;i="4.84,793,1355126400"; d="scan'208";a="28317457" Received: from ironmsg02-lv.qualcomm.com ([10.47.202.183]) by sabertooth01.qualcomm.com with ESMTP; 05 Mar 2013 21:59:51 -0800 Received: from nasanexhc07.na.qualcomm.com ([172.30.39.190]) by ironmsg02-lv.qualcomm.com with ESMTP/TLS/RC4-SHA; 05 Mar 2013 21:59:51 -0800 Received: from localhost (172.30.39.5) by qcmail1.qualcomm.com (172.30.39.190) with Microsoft SMTP Server (TLS) id 14.2.318.4; Tue, 5 Mar 2013 21:59:47 -0800 From: xiong To: CC: , , , "Huang,Xiong" Subject: [PATCH] PCI: add MSI INTX_DISABLE quirks for AR8161/AR8162/AR8171/AR8172 Date: Wed, 6 Mar 2013 13:59:07 +0800 Message-ID: <1362549547-2160-1-git-send-email-xiong@qca.qualcomm.com> X-Mailer: git-send-email 1.8.0.msysgit.0 MIME-Version: 1.0 X-Originating-IP: [172.30.39.5] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: "Huang,Xiong" PCI devices of AR8161/AR8162/AR8171/AR8172 which revision lower than 0x18 have this bug. Signed-off-by: Huang,Xiong --- drivers/pci/quirks.c | 35 +++++++++++++++++++++++++++++++++++ include/linux/pci_ids.h | 4 ++++ 2 files changed, 39 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 0369fb6..bf31d72 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2594,6 +2594,29 @@ static void quirk_msi_intx_disable_ati_bug(struct pci_dev *dev) dev->dev_flags |= PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG; pci_dev_put(p); } +static void quirk_msi_intx_disable_qca_bug(struct pci_dev *dev) +{ + static u16 qca_eth_devid[] = { + PCI_DEVICE_ID_AR8161, + PCI_DEVICE_ID_AR8162, + PCI_DEVICE_ID_AR8171, + PCI_DEVICE_ID_AR8172}; + struct pci_dev *p; + int i; + + /* AR816X/AR817X MSI is fixed at HW level from revision 0x18 */ + for (i = 0; i < ARRAY_SIZE(qca_eth_devid); i++) { + p = pci_get_device(PCI_VENDOR_ID_ATTANSIC, + qca_eth_devid[i], + NULL); + if (!p) + return; + + if (p->revision < 0x18) + dev->dev_flags |= PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG; + pci_dev_put(p); + } +} DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780, quirk_msi_intx_disable_bug); @@ -2643,6 +2666,18 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1073, quirk_msi_intx_disable_bug); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, 0x1083, quirk_msi_intx_disable_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, + PCI_DEVICE_ID_AR8161, + quirk_msi_intx_disable_qca_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, + PCI_DEVICE_ID_AR8162, + quirk_msi_intx_disable_qca_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, + PCI_DEVICE_ID_AR8171, + quirk_msi_intx_disable_qca_bug); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, + PCI_DEVICE_ID_AR8172, + quirk_msi_intx_disable_qca_bug); #endif /* CONFIG_PCI_MSI */ /* Allow manual resource allocation for PCI hotplug bridges diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index f11c1c2..7e171fb 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2438,6 +2438,10 @@ #define PCI_VENDOR_ID_ATTANSIC 0x1969 #define PCI_DEVICE_ID_ATTANSIC_L1 0x1048 #define PCI_DEVICE_ID_ATTANSIC_L2 0x2048 +#define PCI_DEVICE_ID_AR8161 0x1091 +#define PCI_DEVICE_ID_AR8162 0x1090 +#define PCI_DEVICE_ID_AR8171 0x10A1 +#define PCI_DEVICE_ID_AR8172 0x10A0 #define PCI_VENDOR_ID_JMICRON 0x197B #define PCI_DEVICE_ID_JMICRON_JMB360 0x2360