From patchwork Fri May 31 11:20:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Shane" X-Patchwork-Id: 2640161 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 6ED6C3FD2B for ; Fri, 31 May 2013 03:20:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752799Ab3EaDUM (ORCPT ); Thu, 30 May 2013 23:20:12 -0400 Received: from co1ehsobe004.messaging.microsoft.com ([216.32.180.187]:4497 "EHLO co1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752300Ab3EaDUK (ORCPT ); Thu, 30 May 2013 23:20:10 -0400 Received: from mail210-co1-R.bigfish.com (10.243.78.240) by CO1EHSOBE031.bigfish.com (10.243.66.96) with Microsoft SMTP Server id 14.1.225.23; Fri, 31 May 2013 03:20:09 +0000 Received: from mail210-co1 (localhost [127.0.0.1]) by mail210-co1-R.bigfish.com (Postfix) with ESMTP id A89CD3000F1; Fri, 31 May 2013 03:20:09 +0000 (UTC) X-Forefront-Antispam-Report: CIP:163.181.249.109; KIP:(null); UIP:(null); IPV:NLI; H:ausb3twp02.amd.com; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VPS0(zzzz1f42h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ah1fc6hzz8275bhz2dh668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1d2eh1d3fh1dc1h1dfeh1dffh1155h) Received: from mail210-co1 (localhost.localdomain [127.0.0.1]) by mail210-co1 (MessageSwitch) id 1369970407319615_9637; Fri, 31 May 2013 03:20:07 +0000 (UTC) Received: from CO1EHSMHS025.bigfish.com (unknown [10.243.78.245]) by mail210-co1.bigfish.com (Postfix) with ESMTP id 414363C0046; Fri, 31 May 2013 03:20:07 +0000 (UTC) Received: from ausb3twp02.amd.com (163.181.249.109) by CO1EHSMHS025.bigfish.com (10.243.66.35) with Microsoft SMTP Server id 14.1.225.23; Fri, 31 May 2013 03:20:07 +0000 X-WSS-ID: 0MNN7XG-02-7DQ-02 X-M-MSG: Received: from sausexedgep02.amd.com (sausexedgep02-ext.amd.com [163.181.249.73]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ausb3twp02.amd.com (Axway MailGate 3.8.1) with ESMTP id 26A72C8167; Thu, 30 May 2013 22:20:03 -0500 (CDT) Received: from SAUSEXDAG02.amd.com (163.181.55.2) by sausexedgep02.amd.com (163.181.36.59) with Microsoft SMTP Server (TLS) id 8.3.192.1; Thu, 30 May 2013 22:19:52 -0500 Received: from SCYBEXDAG03.amd.com (10.34.11.13) by sausexdag02.amd.com (163.181.55.2) with Microsoft SMTP Server (TLS) id 14.2.328.9; Thu, 30 May 2013 22:20:04 -0500 Received: from shane-Annapurna.amd.com (10.237.74.105) by SCYBEXDAG03.amd.com (10.34.11.13) with Microsoft SMTP Server id 14.2.328.9; Fri, 31 May 2013 11:20:03 +0800 From: Shane Huang To: Tejun Heo CC: Bjorn Helgaas , Jean Delvare , , , , Shane Huang Subject: [PATCH 2/3] ahci: add AMD CZ SATA device ID Date: Fri, 31 May 2013 19:20:09 +0800 Message-ID: <1369999209-2029-1-git-send-email-shane.huang@amd.com> X-Mailer: git-send-email 1.8.1.2 MIME-Version: 1.0 X-OriginatorOrg: amd.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org To add AMD CZ SATA controller device ID of IDE mode. Signed-off-by: Shane Huang --- drivers/ata/ahci.c | 1 + drivers/pci/quirks.c | 2 ++ include/linux/pci_ids.h | 1 + 3 files changed, 4 insertions(+) diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 751f1ea..548f1c3 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -310,6 +310,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { /* AMD */ { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ + { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */ /* AMD is using RAID class only for ahci controllers */ { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci }, diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 7d68aee..5aced49 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -1022,6 +1022,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode); DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CZ_SATA_IDE, quirk_amd_ide_mode); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CZ_SATA_IDE, quirk_amd_ide_mode); /* * Serverworks CSB5 IDE does not fully support native mode diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index e0b5623..22449c1 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -570,6 +570,7 @@ #define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c #define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE 0x7800 #define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b +#define PCI_DEVICE_ID_AMD_CZ_SATA_IDE 0x7900 #define PCI_VENDOR_ID_TRIDENT 0x1023 #define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000