From patchwork Tue Jul 9 05:42:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Zhen-Hua" X-Patchwork-Id: 2825080 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 647E09F756 for ; Tue, 9 Jul 2013 05:43:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7AFBF20149 for ; Tue, 9 Jul 2013 05:43:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3518C2010B for ; Tue, 9 Jul 2013 05:43:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752725Ab3GIFnt (ORCPT ); Tue, 9 Jul 2013 01:43:49 -0400 Received: from g1t0027.austin.hp.com ([15.216.28.34]:22051 "EHLO g1t0027.austin.hp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751185Ab3GIFnt (ORCPT ); Tue, 9 Jul 2013 01:43:49 -0400 Received: from g1t0038.austin.hp.com (g1t0038.austin.hp.com [16.236.32.44]) by g1t0027.austin.hp.com (Postfix) with ESMTP id B7D063823A; Tue, 9 Jul 2013 05:43:48 +0000 (UTC) Received: from piepie.asiapacific.hpqcorp.net (piepie.asiapacific.hpqcorp.net [16.190.193.27]) by g1t0038.austin.hp.com (Postfix) with ESMTP id 40B6530434; Tue, 9 Jul 2013 05:43:46 +0000 (UTC) From: "Li, Zhen-Hua" To: Bjorn Helgaas , , Cc: "Li, Zhen-Hua" Subject: [PATCH 1/1] ia64/pci: set mmio decoding on for some host bridge Date: Tue, 9 Jul 2013 13:42:11 +0800 Message-Id: <1373348531-31893-1-git-send-email-zhen-hual@hp.com> X-Mailer: git-send-email 1.7.10.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On some IA64 platforms with intel PCI bridge, for example, HP BL890c i2 with Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port, when kernel tries to disable the mmio decoding on the PCI bridge devices, kernel may crash. And in the comment of function quirk_mmio_always_on, it also says: "But doing so (disable the mmio decoding) may cause problems on host bridge and perhaps other key system devices" So, for this PCI bridge, dev->mmio_always_on bit should be set to 1. To avoid affecting the use of quirk_mmio_always_on, a new function is created. Signed-off-by: Li, Zhen-Hua --- drivers/pci/quirks.c | 17 +++++++++++++++++ include/linux/pci_ids.h | 1 + 2 files changed, 18 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index e85d230..665af3e 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -44,6 +44,23 @@ static void quirk_mmio_always_on(struct pci_dev *dev) DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); +#ifdef CONFIG_IA64 +/* + * On some IA64 platforms, for some intel PCI bridge devices, for example, + * the Intel Corporation 5520/5500/X58 I/O Hub PCI Express Root Port, + * disable the mmio decoding on this device may cause system crash. + * So dev->mmio_always_on bit should be set to 1. + */ +static void quirk_mmio_on_intel_pcibridge(struct pci_dev *dev) +{ + dev->mmio_always_on = 1; +} +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, + PCI_DEVICE_ID_INTEL_5520_5550_X58, + PCI_CLASS_BRIDGE_PCI, + 8, quirk_mmio_on_intel_pcibridge); +#endif + /* The Mellanox Tavor device gives false positive parity errors * Mark this device with a broken_parity_status, to allow * PCI scanning code to "skip" this now blacklisted device. diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 3bed2e8..d8c60b7 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2742,6 +2742,7 @@ #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2 0x2db2 #define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2 0x2db3 #define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 +#define PCI_DEVICE_ID_INTEL_5520_5550_X58 0x3408 #define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429 #define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a #define PCI_DEVICE_ID_INTEL_IOAT_TBG6 0x342b