From patchwork Tue Aug 13 12:25:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 2843585 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4CDC0BF546 for ; Tue, 13 Aug 2013 12:26:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1CDF520365 for ; Tue, 13 Aug 2013 12:26:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4519420345 for ; Tue, 13 Aug 2013 12:26:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757669Ab3HMM0M (ORCPT ); Tue, 13 Aug 2013 08:26:12 -0400 Received: from mail-bk0-f50.google.com ([209.85.214.50]:36212 "EHLO mail-bk0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753389Ab3HMM0L (ORCPT ); Tue, 13 Aug 2013 08:26:11 -0400 Received: by mail-bk0-f50.google.com with SMTP id mz11so2311663bkb.9 for ; Tue, 13 Aug 2013 05:26:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IfJquUqIj/kXsj83bIp32Zkgy/SSZREH1dHIMDRABgk=; b=MSCHHbYRHSOHQbyfZ9ujpHr0ofx15/cZOU7ODVH7wvEhSRc2HS4TQjoMLbgRZ3oSpL UMmb4szwQ4yUwItv3Khu0DfJiHe5RWBU1R4ouFIxH/F9RMR2J3f0QxvvXQ+2YvJ7i6F9 JjL8BVfoxXohegqdtOUIfYJ6lcEsZMgbKD9A7AcMunrdCFovKSrTY9QZhMPSZSbDiKBH a+nu2MAYWJ6ijVrHz8xnvTgyKwhf5t8kZXQXgXrE/2zYlPLZyetdSJ33oTvA+9Tb3ld0 O6wx1YqK4tpGCk76qaXVxmocZC0Yt5NvcCuDY7Z5Me7/FE5+b7z+E1gZjjOkHXT+c7VF 9tyA== X-Received: by 10.205.20.5 with SMTP id qm5mr53586bkb.46.1376396769745; Tue, 13 Aug 2013 05:26:09 -0700 (PDT) Received: from topkick.lan (dslc-082-083-214-189.pools.arcor-ip.net. [82.83.214.189]) by mx.google.com with ESMTPSA id m6sm6495753bki.7.2013.08.13.05.26.08 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 13 Aug 2013 05:26:08 -0700 (PDT) Received: from edge.wm.mst.uni-hannover.de (firewall.mst.uni-hannover.de [130.75.30.51]) by topkick.lan (Postfix) with ESMTPSA id B2302605E5; Tue, 13 Aug 2013 14:23:38 +0200 (CEST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Cc: Russell King , Jason Cooper , Andrew Lunn , Bjorn Helgaas , Thomas Petazzoni , Thierry Reding , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Subject: [PATCH v2 1/5] PCI: mvebu: move clock enable before register access Date: Tue, 13 Aug 2013 14:25:20 +0200 Message-Id: <1376396724-32048-2-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1376396724-32048-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1376396724-32048-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The clock passed to PCI controller found on MVEBU SoCs may come from a clock gate. This requires the clock to be enabled before any registers are accessed. Therefore, move the clock enable before register iomap to ensure it is enabled. Signed-off-by: Sebastian Hesselbarth --- Changelog: v1->v2: - remove iounmap, add clk_disable_unprepare on failure (Reported by Thomas Pettazoni) Cc: Russell King Cc: Jason Cooper Cc: Andrew Lunn Cc: Bjorn Helgaas Cc: Thomas Petazzoni Cc: Thierry Reding Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-pci@vger.kernel.org --- drivers/pci/host/pci-mvebu.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index 6aa0daf..1533fda 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -897,10 +897,22 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev) continue; } + port->clk = of_clk_get_by_name(child, NULL); + if (IS_ERR(port->clk)) { + dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n", + port->port, port->lane); + continue; + } + + ret = clk_prepare_enable(port->clk); + if (ret) + continue; + port->base = mvebu_pcie_map_registers(pdev, child, port); if (!port->base) { dev_err(&pdev->dev, "PCIe%d.%d: cannot map registers\n", port->port, port->lane); + clk_disable_unprepare(port->clk); continue; } @@ -916,22 +928,9 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev) port->port, port->lane); } - port->clk = of_clk_get_by_name(child, NULL); - if (IS_ERR(port->clk)) { - dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n", - port->port, port->lane); - iounmap(port->base); - port->haslink = 0; - continue; - } - port->dn = child; - - clk_prepare_enable(port->clk); spin_lock_init(&port->conf_lock); - mvebu_sw_pci_bridge_init(port); - i++; }