From patchwork Tue Aug 13 12:25:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 2843596 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EADA39F239 for ; Tue, 13 Aug 2013 12:27:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7A5C12049B for ; Tue, 13 Aug 2013 12:27:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0609320461 for ; Tue, 13 Aug 2013 12:27:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757501Ab3HMM1e (ORCPT ); Tue, 13 Aug 2013 08:27:34 -0400 Received: from mail-bk0-f41.google.com ([209.85.214.41]:37646 "EHLO mail-bk0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757659Ab3HMM0O (ORCPT ); Tue, 13 Aug 2013 08:26:14 -0400 Received: by mail-bk0-f41.google.com with SMTP id na10so2295606bkb.14 for ; Tue, 13 Aug 2013 05:26:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JjLZQa2WHo6UMI6sXzL00KG5SLqbhMkN46WYAsYnTt8=; b=n4wfL9CyQfZBk/2ugscbJlMpfv60UsPu18q/DTXfAKYB1BQmlrlhcCovVI4VW687Jx vY6do/LqudMijugKDxuP/jBve6PLZParBGLk11uY4rv7R1NcgZiYptCNyP3Uj6pGxPJc YnFA/RukpnYOCo4W4Hs/szyYXpoqhJQbhmGMhnrciSPASpnV9yaDwpysbU1RVh5PHgOq tKVnfYXr3Jjy9jiePgHsM3BPX0IHLWrDHJOZOIqx5cVAHN0fOM181sfAAM8ViuG/d10t TAnUFz5EWadhRJdx+u7UU9a09x3I3SkgBMyiT6oq91s40cfhM8UNkSdZJTsvBh+DYGXe vDlQ== X-Received: by 10.205.14.197 with SMTP id pr5mr1478164bkb.25.1376396771488; Tue, 13 Aug 2013 05:26:11 -0700 (PDT) Received: from topkick.lan (dslc-082-083-214-189.pools.arcor-ip.net. [82.83.214.189]) by mx.google.com with ESMTPSA id jh13sm6492766bkb.13.2013.08.13.05.26.09 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 13 Aug 2013 05:26:10 -0700 (PDT) Received: from edge.wm.mst.uni-hannover.de (firewall.mst.uni-hannover.de [130.75.30.51]) by topkick.lan (Postfix) with ESMTPSA id 02F40606EA; Tue, 13 Aug 2013 14:23:39 +0200 (CEST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Cc: Russell King , Jason Cooper , Andrew Lunn , Bjorn Helgaas , Thomas Petazzoni , Thierry Reding , Stephen Warren , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Subject: [PATCH v2 4/5] PCI: mvebu: add support for reset on GPIO Date: Tue, 13 Aug 2013 14:25:23 +0200 Message-Id: <1376396724-32048-5-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1376396724-32048-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1376396724-32048-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a check for DT passed reset-gpios property and deasserts/ asserts reset pin on probe/remove with configurable delay. Corresponding binding documentation is also updated. Signed-off-by: Sebastian Hesselbarth --- Changelog: v1->v2: - use reset API compatible bindings (Reported by Kumar Gala and Thierry Reding) - add gpio properties to DT examples (Reported by Kumar Gala) - only fail (return) on EPROBE_DEFER and skip port parsing otherwise - use us delay instead of ms delay Cc: Russell King Cc: Jason Cooper Cc: Andrew Lunn Cc: Bjorn Helgaas Cc: Thomas Petazzoni Cc: Thierry Reding Cc: Stephen Warren Cc: devicetree@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-pci@vger.kernel.org --- .../devicetree/bindings/pci/mvebu-pci.txt | 6 ++++ drivers/pci/host/pci-mvebu.c | 33 +++++++++++++++++++- 2 files changed, 38 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt index 638673a..8bb3245 100644 --- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt +++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt @@ -76,6 +76,8 @@ and the following optional properties: - marvell,pcie-lane: the physical PCIe lane number, for ports having multiple lanes. If this property is not found, we assume that the value is 0. +- reset-gpios: optional gpio to PERST# +- reset-delay-us: delay in us to wait after reset de-assertion Example: @@ -138,6 +140,10 @@ pcie-controller { interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; marvell,pcie-lane = <0>; + /* low-active PERST# reset on GPIO 25 */ + reset-gpios = <&gpio0 25 1>; + /* wait 20ms for device settle after reset deassertion */ + reset-delay-us = <20000>; clocks = <&gateclk 5>; status = "disabled"; }; diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index bd7092a..a9ad4b3 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -9,14 +9,17 @@ #include #include #include +#include +#include #include #include #include #include #include #include -#include #include +#include +#include #include /* @@ -126,6 +129,9 @@ struct mvebu_pcie_port { unsigned int io_target; unsigned int io_attr; struct clk *clk; + int reset_gpio; + int reset_active_low; + char *reset_name; struct mvebu_sw_pci_bridge bridge; struct device_node *dn; struct mvebu_pcie *pcie; @@ -857,6 +863,7 @@ static int mvebu_pcie_probe(struct platform_device *pdev) i = 0; for_each_child_of_node(pdev->dev.of_node, child) { struct mvebu_pcie_port *port = &pcie->ports[i]; + enum of_gpio_flags flags; if (!of_device_is_available(child)) continue; @@ -897,6 +904,30 @@ static int mvebu_pcie_probe(struct platform_device *pdev) continue; } + port->reset_gpio = of_get_named_gpio_flags(child, + "reset-gpios", 0, &flags); + if (gpio_is_valid(port->reset_gpio)) { + u32 reset_udelay = 20000; + + port->reset_active_low = flags & OF_GPIO_ACTIVE_LOW; + port->reset_name = kasprintf(GFP_KERNEL, + "pcie%d.%d-reset", port->port, port->lane); + of_property_read_u32(child, "reset-delay-us", + &reset_udelay); + + ret = devm_gpio_request_one(&pdev->dev, + port->reset_gpio, GPIOF_DIR_OUT, port->reset_name); + if (ret) { + if (ret == -EPROBE_DEFER) + return ret; + continue; + } + + gpio_set_value(port->reset_gpio, + (port->reset_active_low) ? 1 : 0); + udelay(reset_udelay); + } + port->clk = of_clk_get_by_name(child, NULL); if (IS_ERR(port->clk)) { dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n",