From patchwork Thu Oct 10 12:58:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 3015771 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7F65BBF924 for ; Thu, 10 Oct 2013 12:59:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4CCDA2021C for ; Thu, 10 Oct 2013 12:59:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AAD6E2017D for ; Thu, 10 Oct 2013 12:59:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751664Ab3JJM7I (ORCPT ); Thu, 10 Oct 2013 08:59:08 -0400 Received: from szxga01-in.huawei.com ([119.145.14.64]:45321 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751269Ab3JJM7I (ORCPT ); Thu, 10 Oct 2013 08:59:08 -0400 Received: from 172.24.2.119 (EHLO szxeml206-edg.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id BKA98303; Thu, 10 Oct 2013 20:59:06 +0800 (CST) Received: from SZXEML452-HUB.china.huawei.com (10.82.67.195) by szxeml206-edg.china.huawei.com (172.24.2.59) with Microsoft SMTP Server (TLS) id 14.3.146.0; Thu, 10 Oct 2013 20:58:34 +0800 Received: from localhost (10.135.76.69) by szxeml452-hub.china.huawei.com (10.82.67.195) with Microsoft SMTP Server id 14.3.146.0; Thu, 10 Oct 2013 20:58:29 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , Ben Hutchings , "Yijing Wang" , Hanjun Guo Subject: [Update PATCH -v2] PCI: Avoid initialize MSI/MSIX if device power state != PCI_D0 Date: Thu, 10 Oct 2013 20:58:11 +0800 Message-ID: <1381409891-4704-1-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.11.msysgit.1 MIME-Version: 1.0 X-Originating-IP: [10.135.76.69] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently, if device power state != PCI_D0, we still initialize device MSI/MSIX, but we won't write the MSI message to device MSI/MSIX registers. It's weird, we don't configure MSI/MSIX registers properly, but pci_enable_msi() or pci_enable_msix() return success, and even these registers will never be updated later. So I think it should return error if device power state != PCI_D0. Signed-off-by: Yijing Wang Acked-by: Ben Hutchings --- v1->v2: keep __write_msi_msg() function device power state statement, because Ben Hutchings point out this function may be called during device in D3 state to set irq affinity. We should not touch that. --- drivers/pci/msi.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index d5f90d6..604265c 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -831,7 +831,7 @@ int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec) int status, maxvec; u16 msgctl; - if (!dev->msi_cap) + if (!dev->msi_cap || dev->current_state != PCI_D0) return -EINVAL; pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); @@ -862,7 +862,7 @@ int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec) int ret, nvec; u16 msgctl; - if (!dev->msi_cap) + if (!dev->msi_cap || dev->current_state != PCI_D0) return -EINVAL; pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); @@ -955,7 +955,7 @@ int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) int status, nr_entries; int i, j; - if (!entries || !dev->msix_cap) + if (!entries || !dev->msix_cap || dev->current_state != PCI_D0) return -EINVAL; status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);