From patchwork Wed Nov 20 01:51:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 3205251 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 45E37C045B for ; Wed, 20 Nov 2013 01:52:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6D1F7206E3 for ; Wed, 20 Nov 2013 01:52:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7F6AB206DC for ; Wed, 20 Nov 2013 01:52:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753476Ab3KTBwu (ORCPT ); Tue, 19 Nov 2013 20:52:50 -0500 Received: from aserp1040.oracle.com ([141.146.126.69]:31738 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752355Ab3KTBwt (ORCPT ); Tue, 19 Nov 2013 20:52:49 -0500 Received: from ucsinet21.oracle.com (ucsinet21.oracle.com [156.151.31.93]) by aserp1040.oracle.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.1) with ESMTP id rAK1qegB008973 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 20 Nov 2013 01:52:41 GMT Received: from aserz7021.oracle.com (aserz7021.oracle.com [141.146.126.230]) by ucsinet21.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id rAK1qdRH022262 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 20 Nov 2013 01:52:40 GMT Received: from abhmp0017.oracle.com (abhmp0017.oracle.com [141.146.116.23]) by aserz7021.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id rAK1qdts020027; Wed, 20 Nov 2013 01:52:39 GMT Received: from linux-siqj.site (/10.132.126.191) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 19 Nov 2013 17:52:39 -0800 From: Yinghai Lu To: Bjorn Helgaas Cc: Gu Zheng , Guo Chao , linux-pci@vger.kernel.org, Yinghai Lu Subject: [PATCH 6/6] PCI: Try to allocate mem64 above 4G at first Date: Tue, 19 Nov 2013 17:51:57 -0800 Message-Id: <1384912317-3721-7-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1384912317-3721-1-git-send-email-yinghai@kernel.org> References: <1384912317-3721-1-git-send-email-yinghai@kernel.org> X-Source-IP: ucsinet21.oracle.com [156.151.31.93] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Will fall back to below 4g if it can not find any above 4g. x86 32bit without X86_PAE support will have bottom set to 0, because resource_size_t is 32bit. Also for 32bit with resource_size_t 64bit kernel on machine with pae support we are safe because iomem_resource is limited to 32bit according to x86_phys_bits. -v2: update bottom assigning to make it clear for non-pae support machine. -v3: Bjorn's change: use MAX_RESOURCE instead of -1 use start/end instead of bottom/max for all arch instead of just x86_64 -v4: updated after PCI_MAX_RESOURCE_32 change. -v5: restore io handling to use PCI_MAX_RESOURCE_32 as limit. -v6: checking pcibios_resource_to_bus return for every bus res, to decide it if we need to try high at first. It supports all arches instead of just x86_64. Signed-off-by: Yinghai Lu --- arch/x86/include/asm/pci.h | 1 - drivers/pci/bus.c | 42 ++++++++++++++++++++++++++++++++++-------- drivers/pci/pci.h | 2 ++ include/linux/pci.h | 4 ---- 4 files changed, 36 insertions(+), 13 deletions(-) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 7d74432..73ff4bc 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -125,7 +125,6 @@ int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, /* generic pci stuff */ #include -#define PCIBIOS_MAX_MEM_32 0xffffffff #ifdef CONFIG_NUMA /* Returns the node based on pci bus */ diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 1ffd95b..f801f6a 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -125,15 +125,13 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, { int i, ret = -ENOMEM; struct resource *r; - resource_size_t max = -1; type_mask |= IORESOURCE_IO | IORESOURCE_MEM; - /* don't allocate too high if the pref mem doesn't support 64bit*/ - if (!(res->flags & IORESOURCE_MEM_64)) - max = PCIBIOS_MAX_MEM_32; - pci_bus_for_each_resource(bus, r, i) { + resource_size_t start, end, middle; + struct pci_bus_region region; + if (!r) continue; @@ -147,14 +145,42 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, !(res->flags & IORESOURCE_PREFETCH)) continue; + start = 0; + end = MAX_RESOURCE; + /* + * don't allocate too high if the pref mem doesn't + * support 64bit, also if this is a 64-bit mem + * resource, try above 4GB first + */ + __pcibios_resource_to_bus(bus, ®ion, r); + if (region.start <= PCI_MAX_ADDR_32 && + region.end > PCI_MAX_ADDR_32) { + middle = pcibios_bus_addr_to_res(bus, res->flags, + PCI_MAX_ADDR_32); + if (res->flags & IORESOURCE_MEM_64) + start = middle + 1; + else + end = middle; + } else if (region.start > PCI_MAX_ADDR_32 && + !(res->flags & IORESOURCE_MEM_64)) + continue; + +again: /* Ok, try it out.. */ ret = allocate_resource(r, res, size, - r->start ? : min, - max, align, + max(start, r->start ? : min), + end, align, alignf, alignf_data); if (ret == 0) - break; + return 0; + + if (start != 0) { + start = 0; + goto again; + } } + + return ret; } diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 9c91ecc..aea4efb 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -198,6 +198,8 @@ enum pci_bar_type { pci_bar_mem64, /* A 64-bit memory BAR */ }; +#define PCI_MAX_ADDR_32 ((resource_size_t)0xffffffff) + bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, int crs_timeout); int pci_setup_device(struct pci_dev *dev); diff --git a/include/linux/pci.h b/include/linux/pci.h index 3c6e399..1c69789 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1491,10 +1491,6 @@ static inline struct pci_dev *pci_dev_get(struct pci_dev *dev) #include -#ifndef PCIBIOS_MAX_MEM_32 -#define PCIBIOS_MAX_MEM_32 (-1) -#endif - /* these helpers provide future and backwards compatibility * for accessing popular PCI BAR info */ #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)