From patchwork Sun Dec 8 23:54:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 3307931 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 037C39F1F0 for ; Sun, 8 Dec 2013 23:55:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2814E2021C for ; Sun, 8 Dec 2013 23:55:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 416F22021B for ; Sun, 8 Dec 2013 23:55:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760129Ab3LHXyw (ORCPT ); Sun, 8 Dec 2013 18:54:52 -0500 Received: from aserp1040.oracle.com ([141.146.126.69]:36139 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760093Ab3LHXyf (ORCPT ); Sun, 8 Dec 2013 18:54:35 -0500 Received: from acsinet22.oracle.com (acsinet22.oracle.com [141.146.126.238]) by aserp1040.oracle.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.1) with ESMTP id rB8NsVhm004150 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sun, 8 Dec 2013 23:54:31 GMT Received: from aserz7022.oracle.com (aserz7022.oracle.com [141.146.126.231]) by acsinet22.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id rB8NsU7p004847 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 8 Dec 2013 23:54:30 GMT Received: from abhmp0010.oracle.com (abhmp0010.oracle.com [141.146.116.16]) by aserz7022.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id rB8NsUgr004843; Sun, 8 Dec 2013 23:54:30 GMT Received: from linux-siqj.site.site (/75.36.246.247) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Sun, 08 Dec 2013 15:54:30 -0800 From: Yinghai Lu To: Bjorn Helgaas Cc: Joseph Salisbury , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu , stable@vger.kernel.org Subject: [PATCH 2/2] PCI: Only enable realloc auto when root bus has 64bit mmio Date: Sun, 8 Dec 2013 15:54:29 -0800 Message-Id: <1386546869-31900-3-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1386546869-31900-1-git-send-email-yinghai@kernel.org> References: <1386546869-31900-1-git-send-email-yinghai@kernel.org> X-Source-IP: acsinet22.oracle.com [141.146.126.238] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Joseph found | commit b07f2ebc109b607789f648dedcff4b125f9afec6 | Date: Thu Feb 23 19:23:32 2012 -0800 | | PCI: add a PCI resource reallocation config option cause one system can not load driver for Intel x520 NIC's. The root resource: [ 1.212470] PCI host bridge to bus 0000:20 [ 1.212475] pci_bus 0000:20: root bus resource [bus 20-3e] [ 1.212479] pci_bus 0000:20: root bus resource [io 0xc000-0xdfff] [ 1.212483] pci_bus 0000:20: root bus resource [mem 0xfecc0000-0xfecfffff] [ 1.212487] pci_bus 0000:20: root bus resource [mem 0xe9400000-0xe97fffff] and bios does not assign sriov, also have two function ROM bar point to same position. [ 1.213197] pci 0000:22:00.0: [8086:10fb] type 00 class 0x020000 ... [ 1.213240] pci 0000:22:00.0: reg 0x30: [mem 0xe9500000-0xe957ffff pref] [ 1.213303] pci 0000:22:00.0: reg 0x184: [mem 0x00000000-0x00003fff 64bit] [ 1.213317] pci 0000:22:00.0: reg 0x190: [mem 0x00000000-0x00003fff 64bit] [ 1.213366] pci 0000:22:00.1: [8086:10fb] type 00 class 0x020000 ... [ 1.213408] pci 0000:22:00.1: reg 0x30: [mem 0xe9500000-0xe957ffff pref] [ 1.213468] pci 0000:22:00.1: reg 0x184: [mem 0x00000000-0x00003fff 64bit] [ 1.213481] pci 0000:22:00.1: reg 0x190: [mem 0x00000000-0x00003fff 64bit] [ 1.218527] pci 0000:20:03.0: PCI bridge to [bus 22] [ 1.218534] pci 0000:20:03.0: bridge window [io 0xd000-0xdfff] [ 1.218537] pci 0000:20:03.0: bridge window [mem 0xe9400000-0xe95fffff] ... [ 1.254103] pci 0000:22:00.1: address space collision: [mem 0xe9500000-0xe957ffff pref] conflicts with 0000:22:00.0 [mem 0xe9500000-0xe957ffff pref] [ 1.254111] pci 0000:23:00.1: address space collision: [mem 0xe9700000-0xe977ffff pref] conflicts with 0000:23:00.0 [mem 0xe9700000-0xe977ffff pref] We don't need to enable realloc for this case, as we can not alter root bus mmio range to get big one to hold two rom bar, and sriov under 4G. Add checking if pci root bus have 4G above mmio res, and don't enable realloc auto accordingly. bug report at: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1245938 Reported-by: Joseph Salisbury Signed-off-by: Yinghai Lu Cc: stable@vger.kernel.org --- drivers/pci/setup-bus.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 219a410..f9e6efb 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1432,17 +1432,39 @@ static int iov_resources_unassigned(struct pci_dev *dev, void *data) return 0; } +static bool pci_bus_mem_above_4g(struct pci_bus *bus) +{ + int i; + struct resource *res; + + pci_bus_for_each_resource(bus, res, i) { + struct pci_bus_region region; + + if (!res || !(res->flags & IORESOURCE_MEM)) + continue; + + __pcibios_resource_to_bus(bus, ®ion, res); + if (region.end > 0xffffffff) + return true; + } + + return false; +} + static enum enable_type pci_realloc_detect(struct pci_bus *bus, enum enable_type enable_local) { - bool unassigned = false; - if (enable_local != undefined) return enable_local; - pci_walk_bus(bus, iov_resources_unassigned, &unassigned); - if (unassigned) - return auto_enabled; + /* only enable auto when root bus does support 64bit mmio */ + if (pci_bus_mem_above_4g(bus)) { + bool unassigned = false; + + pci_walk_bus(bus, iov_resources_unassigned, &unassigned); + if (unassigned) + return auto_enabled; + } return enable_local; }