From patchwork Tue Dec 10 06:54:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 3314531 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id F147CC0D4B for ; Tue, 10 Dec 2013 06:55:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 22104202F8 for ; Tue, 10 Dec 2013 06:55:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2B57120340 for ; Tue, 10 Dec 2013 06:55:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751542Ab3LJGzB (ORCPT ); Tue, 10 Dec 2013 01:55:01 -0500 Received: from aserp1040.oracle.com ([141.146.126.69]:51490 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751872Ab3LJGy7 (ORCPT ); Tue, 10 Dec 2013 01:54:59 -0500 Received: from acsinet21.oracle.com (acsinet21.oracle.com [141.146.126.237]) by aserp1040.oracle.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.1) with ESMTP id rBA6ssm5022000 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 10 Dec 2013 06:54:55 GMT Received: from aserz7021.oracle.com (aserz7021.oracle.com [141.146.126.230]) by acsinet21.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id rBA6ssjN004862 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 10 Dec 2013 06:54:54 GMT Received: from abhmp0001.oracle.com (abhmp0001.oracle.com [141.146.116.7]) by aserz7021.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id rBA6sswr004854; Tue, 10 Dec 2013 06:54:54 GMT Received: from linux-siqj.site (/75.36.244.240) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Mon, 09 Dec 2013 22:54:54 -0800 From: Yinghai Lu To: Bjorn Helgaas Cc: Guo Chao , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v4 3/5] PCI: Try to allocate mem64 above 4G at first Date: Mon, 9 Dec 2013 22:54:42 -0800 Message-Id: <1386658484-15774-4-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1386658484-15774-1-git-send-email-yinghai@kernel.org> References: <1386658484-15774-1-git-send-email-yinghai@kernel.org> X-Source-IP: acsinet21.oracle.com [141.146.126.237] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On system with more pcie cards, we do not have enough range under 4G to allocate those pci devices. On 64bit system, we could try to allocate mem64 above 4G at first, and fall back to below 4g if it can not find any above 4g. x86 32bit without X86_PAE support will have bottom set to 0, because resource_size_t is 32bit. For 32bit kernel that resource_size_t is 64bit when pae is support. we are safe because iomem_resource is limited to 32bit according to x86_phys_bits. -v2: update bottom assigning to make it clear for non-pae support machine. -v3: Bjorn's change: use MAX_RESOURCE instead of -1 use start/end instead of bottom/max for all arch instead of just x86_64 -v4: updated after PCI_MAX_RESOURCE_32 change. -v5: restore io handling to use PCI_MAX_RESOURCE_32 as limit. -v6: checking pcibios_resource_to_bus return for every bus res, to decide it if we need to try high at first. It supports all arches instead of just x86_64. -v7: split 4G limit change out to another patch according to Bjorn. also use pci_clip_resource instead. Signed-off-by: Yinghai Lu --- drivers/pci/bus.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 3ad4fd9..45d8de5 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -99,6 +99,8 @@ void pci_bus_remove_resources(struct pci_bus *bus) } static struct pci_bus_region pci_mem_32 = {0, 0xffffffff}; +static struct pci_bus_region pci_mem_64 = {(resource_size_t)(1ULL<<32), + (resource_size_t)(-1ULL)}; static void pci_clip_resource(struct resource *res, struct pci_bus *bus, struct pci_bus_region *region) @@ -149,6 +151,7 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, pci_bus_for_each_resource(bus, r, i) { struct resource avail; + int try_again = 0; if (!r) continue; @@ -165,15 +168,23 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, /* * don't allocate too high if the pref mem doesn't - * support 64bit. + * support 64bit, also if this is a 64-bit mem + * resource, try above 4GB first */ avail = *r; - if (!(res->flags & IORESOURCE_MEM_64)) { + if (res->flags & IORESOURCE_MEM_64) { + pci_clip_resource(&avail, bus, &pci_mem_64); + if (!resource_size(&avail)) + avail = *r; + else + try_again = 1; + } else { pci_clip_resource(&avail, bus, &pci_mem_32); if (!resource_size(&avail)) continue; } +again: /* Ok, try it out.. */ ret = allocate_resource(r, res, size, max(avail.start, r->start ? : min), @@ -181,6 +192,12 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, alignf, alignf_data); if (ret == 0) break; + + if (try_again) { + avail = *r; + try_again = 0; + goto again; + } } return ret; }