From patchwork Wed Jan 8 05:01:55 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minghuan Lian X-Patchwork-Id: 3451571 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B44A19F1C4 for ; Wed, 8 Jan 2014 05:01:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D783F2013D for ; Wed, 8 Jan 2014 05:01:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1F60F20121 for ; Wed, 8 Jan 2014 05:01:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750944AbaAHFBv (ORCPT ); Wed, 8 Jan 2014 00:01:51 -0500 Received: from co9ehsobe003.messaging.microsoft.com ([207.46.163.26]:5892 "EHLO co9outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751062AbaAHFBs (ORCPT ); Wed, 8 Jan 2014 00:01:48 -0500 Received: from mail163-co9-R.bigfish.com (10.236.132.237) by CO9EHSOBE024.bigfish.com (10.236.130.87) with Microsoft SMTP Server id 14.1.225.22; Wed, 8 Jan 2014 05:01:48 +0000 Received: from mail163-co9 (localhost [127.0.0.1]) by mail163-co9-R.bigfish.com (Postfix) with ESMTP id 4FC6424031F; Wed, 8 Jan 2014 05:01:48 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: -1 X-BigFish: VS-1(zz154dIzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6hzz1de098h17326ah8275bh8275dh1de097h186068hz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h2218h2216h226dh22d0h2327h2336h1155h) Received: from mail163-co9 (localhost.localdomain [127.0.0.1]) by mail163-co9 (MessageSwitch) id 138915730652703_31416; Wed, 8 Jan 2014 05:01:46 +0000 (UTC) Received: from CO9EHSMHS011.bigfish.com (unknown [10.236.132.235]) by mail163-co9.bigfish.com (Postfix) with ESMTP id F0F05420049; Wed, 8 Jan 2014 05:01:45 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS011.bigfish.com (10.236.130.21) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 8 Jan 2014 05:01:45 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.3.158.2; Wed, 8 Jan 2014 05:01:45 +0000 Received: from lmh.ap.freescale.net (lmh.ap.freescale.net [10.193.20.65]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s0851V2F018463; Tue, 7 Jan 2014 22:01:42 -0700 From: Minghuan Lian To: CC: Zang Roy-R61911 , Scott Wood , Kumar Gala , Bjorn Helgaas , , Minghuan Lian Subject: [PATCH 04/12][v4] pci: fsl: add early PCI indirect access support Date: Wed, 8 Jan 2014 13:01:55 +0800 Message-ID: <1389157323-3088-4-git-send-email-Minghuan.Lian@freescale.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1389157323-3088-1-git-send-email-Minghuan.Lian@freescale.com> References: <1389157323-3088-1-git-send-email-Minghuan.Lian@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY, UNRESOLVED_TEMPLATE autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The driver needs to read/write PCI configuration very early, at that time architecture-specific PCI controller structure and PCI bus have not been created. The patch provides an interface fsl_arch_fake_pci_bus which should be implemented in architecture-specific PCI driver to fake a PCI controller structure and PCI bus. Using the fake PCI controller and PCI bus, the patch provides the early indirect read/write functions. Signed-off-by: Minghuan Lian --- change log: v4: no change v1-v3: Derived from http://patchwork.ozlabs.org/patch/278965/ Based on upstream master. Based on the discussion of RFC version here http://patchwork.ozlabs.org/patch/274487/ drivers/pci/host/pci-fsl-common.c | 26 ++++++++++++++++++++++++++ include/linux/fsl/pci-common.h | 7 +++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/pci/host/pci-fsl-common.c b/drivers/pci/host/pci-fsl-common.c index d1846ee..a706100 100644 --- a/drivers/pci/host/pci-fsl-common.c +++ b/drivers/pci/host/pci-fsl-common.c @@ -198,6 +198,32 @@ static struct pci_ops fsl_indirect_pci_ops = { .write = fsl_indirect_write_config, }; +#define EARLY_FSL_PCI_OP(rw, size, type) \ +int early_fsl_##rw##_config_##size(struct fsl_pci *pci, int bus, \ + int devfn, int offset, type value) \ +{ \ + return pci_bus_##rw##_config_##size(fsl_arch_fake_pci_bus(pci, bus),\ + devfn, offset, value); \ +} + +EARLY_FSL_PCI_OP(read, byte, u8 *) +EARLY_FSL_PCI_OP(read, word, u16 *) +EARLY_FSL_PCI_OP(read, dword, u32 *) +EARLY_FSL_PCI_OP(write, byte, u8) +EARLY_FSL_PCI_OP(write, word, u16) +EARLY_FSL_PCI_OP(write, dword, u32) + +static int early_fsl_find_capability(struct fsl_pci *pci, + int busnr, int devfn, int cap) +{ + struct pci_bus *bus = fsl_arch_fake_pci_bus(pci, busnr); + + if (!bus) + return 0; + + return pci_bus_find_capability(bus, devfn, cap); +} + static int setup_one_atmu(struct ccsr_pci __iomem *pci, unsigned int index, const struct resource *res, resource_size_t offset) diff --git a/include/linux/fsl/pci-common.h b/include/linux/fsl/pci-common.h index 726f27b..fd6c497 100644 --- a/include/linux/fsl/pci-common.h +++ b/include/linux/fsl/pci-common.h @@ -156,5 +156,12 @@ bool fsl_pci_check_link(struct fsl_pci *pci); /* To avoid touching specified devices */ int fsl_arch_pci_exclude_device(struct fsl_pci *pci, u8 bus, u8 devfn); +/* + * To fake a PCI bus + * it is called by early_fsl_*(), at that time the architecture-dependent + * pci controller and pci bus have not been created. + */ +extern struct pci_bus *fsl_arch_fake_pci_bus(struct fsl_pci *pci, int busnr); + #endif /* __PCI_COMMON_H */ #endif /* __KERNEL__ */