From patchwork Wed Mar 26 13:57:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 3893411 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 726D2BF540 for ; Wed, 26 Mar 2014 14:00:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8192B201FD for ; Wed, 26 Mar 2014 14:00:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A5DE1201E7 for ; Wed, 26 Mar 2014 14:00:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753545AbaCZN7u (ORCPT ); Wed, 26 Mar 2014 09:59:50 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:33824 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755327AbaCZN7s (ORCPT ); Wed, 26 Mar 2014 09:59:48 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2QDx84n016732; Wed, 26 Mar 2014 08:59:08 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2QDx8bO012817; Wed, 26 Mar 2014 08:59:08 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Wed, 26 Mar 2014 08:59:08 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2QDvvW9020104; Wed, 26 Mar 2014 08:59:03 -0500 From: Kishon Vijay Abraham I To: , , , , , , , , CC: , , , , , , , , , , Subject: [RFC PATCH 11/12] ARM: dts: dra7: Add dt data for PCIe controller Date: Wed, 26 Mar 2014 19:27:51 +0530 Message-ID: <1395842272-15267-12-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1395842272-15267-1-git-send-email-kishon@ti.com> References: <1395842272-15267-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Added dt data for PCIe controller. This node contains dt data for both the DRA7 part of designware controller and for the designware core. The documention for this node can be found @ ../bindings/pci/ti-pci.txt. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra7.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 7ac372b..10def39 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -701,6 +701,30 @@ }; }; + pcie@51000000 { + compatible = "ti,dra7xx-pcie"; + reg = <0x51002000 0x14c>, <0x51000000 0x2000>, <0x4A002540 0x1f>; + reg-names = "ti_conf", "rc_dbics", "mmr_unlock"; + interrupts = <0 232 0x4>, <0 233 0x4>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ti,device_type = <3>; + ranges = <0x00000800 0 0x20001000 0x20001000 0 0x00002000 + 0x81000000 0 0 0x20003000 0 0x00010000 + 0x82000000 0 0x20013000 0x20013000 0 0xffed000>; + #interrupt-cells = <1>; + base-mask = <0x00000000 0x0fffffff>; + num-lanes = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0x0 0 &gic 233>; + ti,hwmods = "pcie1"; + phys = <&pcie1_phy>; + phy-names = "pcie-phy"; + resets = <&prm_resets &device_reset>; + reset-names = "reset"; + }; + sata: sata@4a141100 { compatible = "snps,dwc-ahci"; reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;