From patchwork Thu Mar 27 09:26:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 3896951 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 35568BF540 for ; Thu, 27 Mar 2014 09:27:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6664920240 for ; Thu, 27 Mar 2014 09:27:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 30A292021C for ; Thu, 27 Mar 2014 09:27:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753861AbaC0J1W (ORCPT ); Thu, 27 Mar 2014 05:27:22 -0400 Received: from relmlor4.renesas.com ([210.160.252.174]:42596 "EHLO relmlie3.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754167AbaC0J1L (ORCPT ); Thu, 27 Mar 2014 05:27:11 -0400 Received: from unknown (HELO relmlir1.idc.renesas.com) ([10.200.68.151]) by relmlie3.idc.renesas.com with ESMTP; 27 Mar 2014 18:27:10 +0900 Received: from relmlac3.idc.renesas.com (relmlac3.idc.renesas.com [10.200.69.23]) by relmlir1.idc.renesas.com (Postfix) with ESMTP id 792C44BEDB; Thu, 27 Mar 2014 18:27:10 +0900 (JST) Received: by relmlac3.idc.renesas.com (Postfix, from userid 0) id 6D3E4180A0; Thu, 27 Mar 2014 18:27:10 +0900 (JST) Received: from relmlac3.idc.renesas.com (localhost [127.0.0.1]) by relmlac3.idc.renesas.com (Postfix) with ESMTP id 66E9A1809F; Thu, 27 Mar 2014 18:27:10 +0900 (JST) Received: from relmlii2.idc.renesas.com [10.200.68.66] by relmlac3.idc.renesas.com with ESMTP id UAD17246; Thu, 27 Mar 2014 18:27:10 +0900 X-IronPort-AV: E=Sophos;i="4.97,741,1389711600"; d="scan'208";a="157456554" Received: from unknown (HELO relay41.aps.necel.com) ([10.29.19.9]) by relmlii2.idc.renesas.com with ESMTP; 27 Mar 2014 18:27:10 +0900 Received: from DU0NOTES13.ad.ree.renesas.com ([172.29.24.131]) by relay41.aps.necel.com (8.14.4+Sun/8.14.4) with ESMTP id s2R9R33F015745; Thu, 27 Mar 2014 18:27:08 +0900 (JST) Received: from duacsls.ad.ree.renesas.com ([172.29.43.47]) by DU0NOTES13.ad.ree.renesas.com (Lotus Domino Release 8.5.3 HF466) with ESMTP id 2014032710270200-166385 ; Thu, 27 Mar 2014 10:27:02 +0100 From: Phil Edworthy To: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org, LAKML , Bjorn Helgaas , Valentine Barshak , Simon Horman , Magnus Damm , Ben Dooks , Phil Edworthy , devicetree@vger.kernel.org X-Mailer: git-send-email 1.9.0 In-Reply-To: <1395912416-20087-1-git-send-email-phil.edworthy@renesas.com> References: <1395912416-20087-1-git-send-email-phil.edworthy@renesas.com> X-TNEFEvaluated: 1 Message-ID: <1395912416-20087-6-git-send-email-phil.edworthy@renesas.com> Date: Thu, 27 Mar 2014 09:26:51 +0000 Subject: [PATCH v6 05/10] dt-bindings: pci: rcar pcie device tree bindings X-MIMETrack: Itemize by SMTP Server on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 27.03.2014 10:27:02, Serialize by Router on DU0NOTES13/SERVER/REE(Release 8.5.3 HF466|March 09, 2012) at 27.03.2014 10:27:08, Serialize complete at 27.03.2014 10:27:08 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the bindings for the R-Car PCIe driver. The driver resides under drivers/pci/host/pcie-rcar.c Signed-off-by: Phil Edworthy v6: - Correct DT bindings description for reg and clocks v5: - Add PCIe bus clock reference - Add additional interrupt bindings - Use dma-ranges property to specify inbound memory regions --- Documentation/devicetree/bindings/pci/rcar-pci.txt | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci.txt diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt new file mode 100644 index 0000000..a97ebe6 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -0,0 +1,45 @@ +* Renesas RCar PCIe interface + +Required properties: +- compatible: should contain one of the following + "renesas,pcie-r8a7779", "renesas,pcie-r8a7790", "renesas,pcie-r8a7791" +- reg: base address and length of the pcie controller registers. +- #address-cells: set to <3> +- #size-cells: set to <2> +- device_type: set to "pci" +- ranges: ranges for the PCI memory and I/O regions. +- dma-ranges: ranges for the inbound memory regions. +- interrupts: two interrupt sources for MSI interrupts, followed by interrupt + source for hardware related interrupts (e.g. link speed change). +- #interrupt-cells: set to <1> +- interrupt-map-mask and interrupt-map: standard PCI properties + to define the mapping of the PCIe interface to interrupt + numbers. +- clocks: from common clock binding: phandles to PCIe controller and PCIe bus + clocks. +- clock-names: from common clock binding: should be "pcie" and "pcie_bus". + +Example: + +SoC specific DT Entry: + + pcie: pcie@fe000000 { + compatible = "renesas,pcie-r8a7791"; + reg = <0 0xfe000000 0 0x80000>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 + 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 + 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 + 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000 + 0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>; + interrupts = <0 116 4 0 117 4 0 118 4>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic 0 116 4>; + clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>; + clock-names = "pcie", "pcie_bus"; + status = "disabled"; + };