From patchwork Fri May 16 08:05:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 4188371 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CB4A69F1C0 for ; Fri, 16 May 2014 08:12:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F2350201BA for ; Fri, 16 May 2014 08:12:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C460D20117 for ; Fri, 16 May 2014 08:11:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756704AbaEPIH3 (ORCPT ); Fri, 16 May 2014 04:07:29 -0400 Received: from mga11.intel.com ([192.55.52.93]:27198 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756702AbaEPIH1 (ORCPT ); Fri, 16 May 2014 04:07:27 -0400 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 16 May 2014 01:07:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,1065,1389772800"; d="scan'208";a="540107917" Received: from gerry-dev.bj.intel.com ([10.238.158.74]) by fmsmga002.fm.intel.com with ESMTP; 16 May 2014 01:07:20 -0700 From: Jiang Liu To: Benjamin Herrenschmidt , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , "Rafael J. Wysocki" , Bjorn Helgaas , Randy Dunlap , Yinghai Lu , Len Brown , Pavel Machek , x86@kernel.org Cc: Jiang Liu , Konrad Rzeszutek Wilk , Andrew Morton , Tony Luck , Joerg Roedel , Paul Gortmaker , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org, sfi-devel@simplefirmware.org, linux-pm@vger.kernel.org Subject: [RFC Patch Part1 V1 26/30] x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins Date: Fri, 16 May 2014 16:05:46 +0800 Message-Id: <1400227550-5935-27-git-send-email-jiang.liu@linux.intel.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1400227550-5935-1-git-send-email-jiang.liu@linux.intel.com> References: <1400227550-5935-1-git-send-email-jiang.liu@linux.intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Refine ACPI to use common irqdomain map interface to program IOAPIC pins, so we can unify the callsite to progam IOAPIC pins. Signed-off-by: Jiang Liu --- arch/x86/kernel/acpi/boot.c | 48 ++++++++++++++++--------------------------- 1 file changed, 18 insertions(+), 30 deletions(-) diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 1ee639e74d50..50f06c9d1e2a 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -332,7 +332,9 @@ static void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity); -static struct irq_domain_ops acpi_irqdomain_ops; +static struct irq_domain_ops acpi_irqdomain_ops = { + .map = mp_irqdomain_map, +}; static struct irq_domain *acpi_create_irqdomain(int idx, void *arg) { @@ -512,10 +514,6 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) int irq = map_gsi_to_irq(gsi, 1); if (irq >= 0) { -#ifdef CONFIG_X86_IO_APIC - if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) - setup_IO_APIC_irq_extra(gsi); -#endif *irqp = irq; return 0; } @@ -1047,11 +1045,7 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) { - int irq; - int ioapic; - int ioapic_pin; - struct io_apic_irq_attr irq_attr; - int ret; + int irq, ioapic, pin, node; if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) return gsi; @@ -1060,35 +1054,29 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, if (acpi_gbl_FADT.sci_interrupt == gsi) return gsi; - irq = map_gsi_to_irq(gsi, 1); - if (irq < 0) - return ACPI_INVALID_GSI; - ioapic = mp_find_ioapic(gsi); if (ioapic < 0) { - printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); - return gsi; + pr_warn("No IOAPIC for GSI %u\n", gsi); + return ACPI_INVALID_GSI; } - ioapic_pin = mp_find_ioapic_pin(ioapic, gsi); - - if (ioapic_pin > MP_MAX_IOAPIC_PIN) { - printk(KERN_ERR "Invalid reference to IOAPIC pin " - "%d-%d\n", mpc_ioapic_id(ioapic), - ioapic_pin); - return gsi; + pin = mp_find_ioapic_pin(ioapic, gsi); + node = dev ? dev_to_node(dev) : NUMA_NO_NODE; + if (mp_set_pin_attr(ioapic, pin, + trigger == ACPI_EDGE_SENSITIVE ? 0 : 1, + polarity == ACPI_ACTIVE_HIGH ? 0 : 1, + node)) { + pr_warn("Failed to set pin attr for GSI%d\n", gsi); + return ACPI_INVALID_GSI; } + irq = map_gsi_to_irq(gsi, 1); + if (irq < 0) + return ACPI_INVALID_GSI; + if (enable_update_mptable) mp_config_acpi_gsi(dev, gsi, trigger, polarity); - set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin, - trigger == ACPI_EDGE_SENSITIVE ? 0 : 1, - polarity == ACPI_ACTIVE_HIGH ? 0 : 1); - ret = io_apic_set_pci_routing(dev, irq, &irq_attr); - if (ret < 0) - gsi = ACPI_INVALID_GSI; - return gsi; }