From patchwork Mon May 19 16:23:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiang Liu X-Patchwork-Id: 4203631 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2682D9F369 for ; Mon, 19 May 2014 16:26:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 54ACB200F2 for ; Mon, 19 May 2014 16:26:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A0316201E4 for ; Mon, 19 May 2014 16:26:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964947AbaESQZz (ORCPT ); Mon, 19 May 2014 12:25:55 -0400 Received: from mga01.intel.com ([192.55.52.88]:62335 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932440AbaESQZx (ORCPT ); Mon, 19 May 2014 12:25:53 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 19 May 2014 09:25:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.98,868,1392192000"; d="scan'208";a="534297300" Received: from gerry-dev.bj.intel.com ([10.238.158.74]) by fmsmga001.fm.intel.com with ESMTP; 19 May 2014 09:25:32 -0700 From: Jiang Liu To: Benjamin Herrenschmidt , Thomas Gleixner , Grant Likely , Ingo Molnar , "H. Peter Anvin" , "Rafael J. Wysocki" , Bjorn Helgaas , Randy Dunlap , Yinghai Lu , x86@kernel.org, Len Brown , David Cohen , Kuppuswamy Sathyanarayanan , Jiang Liu Cc: Konrad Rzeszutek Wilk , Andrew Morton , Tony Luck , Joerg Roedel , Paul Gortmaker , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org, "H. Peter Anvin" , sfi-devel@simplefirmware.org Subject: [Patch Part1 V2 27/29] x86, irq, SFI: use common irqdomain map interface to program IOAPIC pins Date: Tue, 20 May 2014 00:23:11 +0800 Message-Id: <1400516594-11544-28-git-send-email-jiang.liu@linux.intel.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1400516594-11544-1-git-send-email-jiang.liu@linux.intel.com> References: <1400516594-11544-1-git-send-email-jiang.liu@linux.intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Refine SFI to use common irqdomain map interface to program IOAPIC pins, so we can unify the callsite to progam IOAPIC pins. Signed-off-by: Jiang Liu --- arch/x86/pci/intel_mid_pci.c | 17 +++++++---------- arch/x86/platform/intel-mid/sfi.c | 18 +++++++++--------- arch/x86/platform/sfi/sfi.c | 4 +++- 3 files changed, 19 insertions(+), 20 deletions(-) diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c index 84b9d672843d..f6f3de857baa 100644 --- a/arch/x86/pci/intel_mid_pci.c +++ b/arch/x86/pci/intel_mid_pci.c @@ -208,23 +208,20 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, static int intel_mid_pci_irq_enable(struct pci_dev *dev) { - u8 pin; - struct io_apic_irq_attr irq_attr; - - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); + int ioapic, polarity; /* * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to * IOAPIC RTE entries, so we just enable RTE for the device. */ - irq_attr.ioapic = mp_find_ioapic(dev->irq); - irq_attr.ioapic_pin = dev->irq; - irq_attr.trigger = 1; /* level */ + ioapic = mp_find_ioapic(dev->irq); if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER) - irq_attr.polarity = 0; /* active high */ + polarity = 0; /* active high */ else - irq_attr.polarity = 1; /* active low */ - io_apic_set_pci_routing(&dev->dev, dev->irq, &irq_attr); + polarity = 1; /* active low */ + if (mp_set_pin_attr(ioapic, dev->irq, 1, polarity, dev_to_node(dev))) + return -EBUSY; + mp_map_gsi_to_irq(dev->irq, 1); return 0; } diff --git a/arch/x86/platform/intel-mid/sfi.c b/arch/x86/platform/intel-mid/sfi.c index 994c40bd7cb7..3fe5c23ba1c5 100644 --- a/arch/x86/platform/intel-mid/sfi.c +++ b/arch/x86/platform/intel-mid/sfi.c @@ -434,6 +434,7 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) struct devs_id *dev = NULL; int num, i; int ioapic; + int polarity; struct io_apic_irq_attr irq_attr; sb = (struct sfi_table_simple *)table; @@ -450,30 +451,29 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) */ ioapic = mp_find_ioapic(irq); if (ioapic >= 0) { - irq_attr.ioapic = ioapic; - irq_attr.ioapic_pin = irq; - irq_attr.trigger = 1; if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER) { if (!strncmp(pentry->name, "r69001-ts-i2c", 13)) /* active low */ - irq_attr.polarity = 1; + polarity = 1; else if (!strncmp(pentry->name, "synaptics_3202", 14)) /* active low */ - irq_attr.polarity = 1; + polarity = 1; else if (irq == 41) /* fast_int_1 */ - irq_attr.polarity = 1; + polarity = 1; else /* active high */ - irq_attr.polarity = 0; + polarity = 0; } else { /* PNW and CLV go with active low */ - irq_attr.polarity = 1; + polarity = 1; } - io_apic_set_pci_routing(NULL, irq, &irq_attr); + if (mp_set_pin_attr(ioapic, irq, 1, polarity, NUMA_NO_NODE)) + return -EBUSY; + mp_map_gsi_to_irq(dev->irq, 1); } } else { irq = 0; /* No irq */ diff --git a/arch/x86/platform/sfi/sfi.c b/arch/x86/platform/sfi/sfi.c index 2c3522dfa05d..91e5046efae9 100644 --- a/arch/x86/platform/sfi/sfi.c +++ b/arch/x86/platform/sfi/sfi.c @@ -71,7 +71,9 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table) #endif /* CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_IO_APIC -static struct irq_domain_ops sfi_ioapic_irqdomain_ops; +static struct irq_domain_ops sfi_ioapic_irqdomain_ops = { + .map = mp_irqdomain_map, +}; static struct irq_domain *sfi_ioapic_create_irqdomain(int ioapic, void *arg) {