From patchwork Tue Aug 5 16:11:08 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Minter X-Patchwork-Id: 4680291 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D0B00C033A for ; Tue, 5 Aug 2014 16:12:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1B22F2017D for ; Tue, 5 Aug 2014 16:12:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F294F201CE for ; Tue, 5 Aug 2014 16:12:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754752AbaHEQMF (ORCPT ); Tue, 5 Aug 2014 12:12:05 -0400 Received: from mail-we0-f175.google.com ([74.125.82.175]:42173 "EHLO mail-we0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753710AbaHEQMD (ORCPT ); Tue, 5 Aug 2014 12:12:03 -0400 Received: by mail-we0-f175.google.com with SMTP id t60so1284165wes.34 for ; Tue, 05 Aug 2014 09:12:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=myport.ac.uk; s=google-20130730; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Og4ObXP7UQywgFnZbWRjWnv3NkiY/c9e4rencgDKJiU=; b=XvlUT4OuUQphPlGKJvB90v3JSiydF4A8qWtVqDx221Cm5aOKAxaGTtwcgpu6uMbCJW YQ3zHevJLWol3pfyCS+7K6knR6KXUEtm2fcipAkMnUw09Z1arO8doNevyNhbCkx3axiK 1rh8QGFDpanAL2XP+Qbe0aV/zXNjEc4usHx1Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Og4ObXP7UQywgFnZbWRjWnv3NkiY/c9e4rencgDKJiU=; b=F96rduivmnYp2j6vvlCB4AyecI3AZgTEQTrtsrd9sS5Q+hcrzctN6pv1YhhaY5odXG 13hW0p7CAPwLKjKhFVHxMykpM8SJT11ijLjAFYUf8n54WkEK9nfnpnbLCy6BnJlF8A9+ 7lqtMiCHuKAMr3OZwEIUo59hX1s1EMyPps8BuKrZS4p4k/pvAl2n+2iLZ6vjg9m8G129 6Vhj6mto8N43q5QDPyRKf2vJzk3cT2AvHDwyA+oxnqy/1leFrQqj2g+OygTdcqDZj5Nn /iTrvHLtYQNdg46zEEF08Sx8NSiK+NOU8Kld1VApqShUre/HHYgi7Ia4/TW0IZCfy4Yl q66Q== X-Gm-Message-State: ALoCoQlTtKxFLle7/ywvN/iuUVjSrqetNVE3o0ABtwTJxAKuVgIIc/KSJc+ncF23L+7WdzZ+w9hj X-Received: by 10.180.21.235 with SMTP id y11mr7679217wie.75.1407255122124; Tue, 05 Aug 2014 09:12:02 -0700 (PDT) Received: from localhost.xy01.xyratex.com (xyratex195.xyratex.com. [194.131.166.195]) by mx.google.com with ESMTPSA id e3sm5169369wjp.4.2014.08.05.09.12.01 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 05 Aug 2014 09:12:01 -0700 (PDT) From: matthew_minter@xyratex.com To: bhelgaas@google.com, linux-pci@vger.kernel.org Cc: matthew_minter Subject: [PATCH 07/22] Fixed PCI initilisation code for arches which dont need to map irqs Date: Tue, 5 Aug 2014 17:11:08 +0100 Message-Id: <1407255083-9356-8-git-send-email-matthew_minter@xyratex.com> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1407255083-9356-1-git-send-email-matthew_minter@xyratex.com> References: <1407255083-9356-1-git-send-email-matthew_minter@xyratex.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: matthew_minter --- drivers/pci/setup-irq.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c index a994e07..7bb4356 100644 --- a/drivers/pci/setup-irq.c +++ b/drivers/pci/setup-irq.c @@ -30,6 +30,11 @@ void pdev_assign_irq(struct pci_dev *dev, u8 slot = -1; int irq = 0; + if (!map_irq) { + dev_dbg(&dev->dev, "map_irq not provided by arch\n", dev->irq); + return; + } + /* If this device is not on the primary bus, we need to figure out which interrupt pin it will come in on. We know which slot it will come in on 'cos that slot is where the bridge is. Each