From patchwork Thu Sep 25 03:14:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 4972111 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8BE169FA52 for ; Thu, 25 Sep 2014 02:51:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BC10720107 for ; Thu, 25 Sep 2014 02:51:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F2DB02025A for ; Thu, 25 Sep 2014 02:51:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753123AbaIYCvV (ORCPT ); Wed, 24 Sep 2014 22:51:21 -0400 Received: from szxga01-in.huawei.com ([119.145.14.64]:37208 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752961AbaIYCvJ (ORCPT ); Wed, 24 Sep 2014 22:51:09 -0400 Received: from 172.24.2.119 (EHLO szxeml409-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CCC72767; Thu, 25 Sep 2014 10:50:58 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.158.1; Thu, 25 Sep 2014 10:50:48 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , "Sergei Shtylyov" , Michael Ellerman , Thierry Reding , "Thomas Petazzoni" , Yijing Wang Subject: [PATCH v2 19/22] IA64/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Thu, 25 Sep 2014 11:14:29 +0800 Message-ID: <1411614872-4009-20-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang --- arch/ia64/kernel/msi_ia64.c | 18 ++++++++++++++---- 1 files changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c index 4efe748..55ac859 100644 --- a/arch/ia64/kernel/msi_ia64.c +++ b/arch/ia64/kernel/msi_ia64.c @@ -112,15 +112,15 @@ static struct irq_chip ia64_msi_chip = { }; -int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) +static int arch_ia64_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) { if (platform_setup_msi_irq) - return platform_setup_msi_irq(pdev, desc); + return platform_setup_msi_irq(dev, desc); - return ia64_setup_msi_irq(pdev, desc); + return ia64_setup_msi_irq(dev, desc); } -void arch_teardown_msi_irq(unsigned int irq) +static void arch_ia64_teardown_msi_irq(unsigned int irq) { if (platform_teardown_msi_irq) return platform_teardown_msi_irq(irq); @@ -128,6 +128,16 @@ void arch_teardown_msi_irq(unsigned int irq) return ia64_teardown_msi_irq(irq); } +static struct msi_chip chip = { + .setup_irq = arch_ia64_setup_msi_irq, + .teardown_irq = arch_ia64_teardown_msi_irq, +}; + +struct msi_chip *arch_find_msi_chip(struct pci_dev *dev) +{ + return &chip; +} + #ifdef CONFIG_INTEL_IOMMU #ifdef CONFIG_SMP static int dmar_msi_set_affinity(struct irq_data *data,