From patchwork Mon Sep 29 05:03:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 4993651 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 358A6BEEA7 for ; Mon, 29 Sep 2014 05:33:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 75F37201BC for ; Mon, 29 Sep 2014 05:33:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 94859201C7 for ; Mon, 29 Sep 2014 05:33:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751777AbaI2Fdh (ORCPT ); Mon, 29 Sep 2014 01:33:37 -0400 Received: from mail-by2on0114.outbound.protection.outlook.com ([207.46.100.114]:25952 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751439AbaI2FdU (ORCPT ); Mon, 29 Sep 2014 01:33:20 -0400 Received: from BN3PR0301CA0008.namprd03.prod.outlook.com (25.160.180.146) by BY1PR0301MB0856.namprd03.prod.outlook.com (25.160.193.15) with Microsoft SMTP Server (TLS) id 15.0.1039.15; Mon, 29 Sep 2014 05:33:17 +0000 Received: from BY2FFO11FD056.protection.gbl (2a01:111:f400:7c0c::190) by BN3PR0301CA0008.outlook.office365.com (2a01:111:e400:4000::18) with Microsoft SMTP Server (TLS) id 15.0.1039.15 via Frontend Transport; Mon, 29 Sep 2014 05:33:16 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11FD056.mail.protection.outlook.com (10.1.15.193) with Microsoft SMTP Server (TLS) id 15.0.1029.15 via Frontend Transport; Mon, 29 Sep 2014 05:33:16 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s8T5XBxJ021413; Sun, 28 Sep 2014 22:33:13 -0700 Received: by shlinux1.ap.freescale.net (Postfix, from userid 1003) id 45C071AE202; Mon, 29 Sep 2014 13:03:18 +0800 (CST) From: Richard Zhu To: CC: , , , , , Richard Zhu Subject: [PATCH v3 1/9] PCI: imx6: wait the clocks to stabilize after ref_en Date: Mon, 29 Sep 2014 13:03:09 +0800 Message-ID: <1411966997-27118-2-git-send-email-r65037@freescale.com> X-Mailer: git-send-email 1.7.8 In-Reply-To: <1411966997-27118-1-git-send-email-r65037@freescale.com> References: <1411966997-27118-1-git-send-email-r65037@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(199003)(189002)(10300001)(2351001)(229853001)(99396003)(92566001)(74502003)(81542003)(120916001)(42186005)(33646002)(16796002)(4396001)(50226001)(87286001)(50466002)(77096002)(45336002)(31966008)(48376002)(93916002)(6806004)(44976005)(64706001)(106466001)(107046002)(92726001)(74662003)(80022003)(81342003)(79102003)(110136001)(90102001)(46386002)(77982003)(20776003)(46102003)(103686003)(105586002)(76482002)(50986999)(68736004)(95666004)(76176999)(83322001)(19580405001)(19580395003)(62966002)(87936001)(85306004)(21056001)(97736003)(84676001)(47776003)(26826002)(85852003)(83072002)(104166001)(88136002)(52956003)(77156001)(36756003)(101416001)(89996001)(102836001)(90966001); DIR:OUT; SFP:1102; SCL:1; SRVR:BY1PR0301MB0856; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; A:0; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BY1PR0301MB0856; X-Forefront-PRVS: 034902F5BC Received-SPF: None (protection.outlook.com: shlinux1.ap.freescale.net does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 192.88.168.50) smtp.mailfrom=r65037@shlinux1.ap.freescale.net; X-OriginatorOrg: freescale.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For boards without a reset gpio we skip the delay between enabling the pcie_ref_clk and touching the RC registers for configuration. System would be hangs when the clocks are not yet settled in the DW PCIe core. So we need to make sure that there is always an appropriate delay between those two actions. Signed-off-by: Richard Zhu --- drivers/pci/host/pci-imx6.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index 233fe8a..eac96fb 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -275,15 +275,22 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) goto err_pcie; } - /* allow the clocks to stabilize */ - usleep_range(200, 500); - /* power up core phy and enable ref clock */ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18); + /* + * the async reset input need ref clock to sync internally, + * when the ref clock comes after reset, internal synced + * reset time is too short , cannot meet the requirement. + * add one ~10us delay here. + */ + udelay(10); regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); + /* allow the clocks to stabilize */ + usleep_range(200, 500); + /* Some boards don't have PCIe reset GPIO. */ if (gpio_is_valid(imx6_pcie->reset_gpio)) { gpio_set_value(imx6_pcie->reset_gpio, 0);