From patchwork Tue Sep 30 09:36:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 5001721 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D78F29F3DF for ; Tue, 30 Sep 2014 10:07:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 09C47201C7 for ; Tue, 30 Sep 2014 10:07:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 37964201B4 for ; Tue, 30 Sep 2014 10:07:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751857AbaI3KHM (ORCPT ); Tue, 30 Sep 2014 06:07:12 -0400 Received: from mail-bn1on0119.outbound.protection.outlook.com ([157.56.110.119]:30081 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751497AbaI3KHJ (ORCPT ); Tue, 30 Sep 2014 06:07:09 -0400 Received: from BL2PR03MB339.namprd03.prod.outlook.com (10.141.68.23) by BL2PR03MB436.namprd03.prod.outlook.com (10.141.92.26) with Microsoft SMTP Server (TLS) id 15.0.1039.15; Tue, 30 Sep 2014 10:07:07 +0000 Received: from DM2PR03CA0026.namprd03.prod.outlook.com (10.141.96.25) by BL2PR03MB339.namprd03.prod.outlook.com (10.141.68.23) with Microsoft SMTP Server (TLS) id 15.0.1044.7; Tue, 30 Sep 2014 10:07:05 +0000 Received: from BL2FFO11FD006.protection.gbl (2a01:111:f400:7c09::124) by DM2PR03CA0026.outlook.office365.com (2a01:111:e400:2428::25) with Microsoft SMTP Server (TLS) id 15.0.1039.15 via Frontend Transport; Tue, 30 Sep 2014 10:07:04 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD006.mail.protection.outlook.com (10.173.161.2) with Microsoft SMTP Server (TLS) id 15.0.1029.15 via Frontend Transport; Tue, 30 Sep 2014 10:07:04 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s8UA70Yb011201; Tue, 30 Sep 2014 03:07:02 -0700 Received: by shlinux1.ap.freescale.net (Postfix, from userid 1003) id BFD601AE203; Tue, 30 Sep 2014 17:36:44 +0800 (CST) From: Richard Zhu To: CC: , , , , , Richard Zhu Subject: [PATCH v4 01/10] PCI: imx6: wait the clocks to stabilize after ref_en Date: Tue, 30 Sep 2014 17:36:35 +0800 Message-ID: <1412069804-17162-2-git-send-email-r65037@freescale.com> X-Mailer: git-send-email 1.7.8 In-Reply-To: <1412069804-17162-1-git-send-email-r65037@freescale.com> References: <1412069804-17162-1-git-send-email-r65037@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(189002)(199003)(50466002)(76482002)(87936001)(42186005)(87286001)(229853001)(46386002)(92726001)(33646002)(92566001)(85852003)(45336002)(20776003)(64706001)(50986999)(47776003)(110136001)(19580405001)(93916002)(6806004)(48376002)(107046002)(101416001)(88136002)(76176999)(19580395003)(4396001)(84676001)(50226001)(52956003)(89996001)(62966002)(26826002)(102836001)(95666004)(105586002)(103686003)(10300001)(97736003)(36756003)(99396003)(46102003)(68736004)(16796002)(106466001)(31966008)(104166001)(44976005)(2351001)(77096002)(77156001)(120916001)(85306004)(80022003)(21056001)(90966001); DIR:OUT; SFP:1102; SCL:1; SRVR:BL2PR03MB339; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:0; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BL2PR03MB339; X-Exchange-Antispam-Report-Test: UriScan:; X-Forefront-PRVS: 0350D7A55D Received-SPF: None (protection.outlook.com: shlinux1.ap.freescale.net does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 192.88.168.50) smtp.mailfrom=r65037@shlinux1.ap.freescale.net; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BL2PR03MB436; X-OriginatorOrg: freescale.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For boards without a reset gpio we skip the delay between enabling the pcie_ref_clk and touching the RC registers for configuration. System would be hangs when the clocks are not yet settled in the DW PCIe core. So we need to make sure that there is always an appropriate delay between those two actions. Signed-off-by: Richard Zhu --- drivers/pci/host/pci-imx6.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index 233fe8a..eac96fb 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -275,15 +275,22 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) goto err_pcie; } - /* allow the clocks to stabilize */ - usleep_range(200, 500); - /* power up core phy and enable ref clock */ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18); + /* + * the async reset input need ref clock to sync internally, + * when the ref clock comes after reset, internal synced + * reset time is too short , cannot meet the requirement. + * add one ~10us delay here. + */ + udelay(10); regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); + /* allow the clocks to stabilize */ + usleep_range(200, 500); + /* Some boards don't have PCIe reset GPIO. */ if (gpio_is_valid(imx6_pcie->reset_gpio)) { gpio_set_value(imx6_pcie->reset_gpio, 0);