From patchwork Mon Oct 13 09:50:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 5074801 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 965E99F30B for ; Mon, 13 Oct 2014 09:50:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0816E201F5 for ; Mon, 13 Oct 2014 09:50:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C1322200EC for ; Mon, 13 Oct 2014 09:50:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752937AbaJMJu3 (ORCPT ); Mon, 13 Oct 2014 05:50:29 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:8220 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752903AbaJMJu2 (ORCPT ); Mon, 13 Oct 2014 05:50:28 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Mon, 13 Oct 2014 02:51:00 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 13 Oct 2014 02:50:08 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 13 Oct 2014 02:50:08 -0700 Received: from vidyas-desktop.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.342.0; Mon, 13 Oct 2014 02:50:27 -0700 From: Vidya Sagar To: CC: , , , , , , Subject: [PATCH v4] PCI: tegra: add PM-ops support Date: Mon, 13 Oct 2014 15:20:03 +0530 Message-ID: <1413193803-21718-1-git-send-email-vidyas@nvidia.com> X-Mailer: git-send-email 1.8.1.5 X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP adds support for suspend_noirq and resume_noirq hooks of PM framework. Enables powergating of PCIe partition during suspend. It also separates allocation part from tegra_pcie_enable_msi() to make a new API tegra_pcie_alloc_msi() to avoid passing extra param in the original API Signed-off-by: Vidya Sagar --- v4: changed type of num_ports from int to unsigned int in tegra_pcie_check_ports() took care of indentation issues v3: Modified commit message according to review comments powering off PCIe in resume if no devices are found instead of putting the resources removed unnecessary whitespace changes modified tegra_pcie_check_ports to return number of ports active v2: separated alloc_msi from enable_msi changed tegra_pcie_check_ports to a static function removed irrelevant comments NOTE: This patch currently uses suspend_noirq, resume_noirq calls as the PCI subsystem (in its own _noirq call) tries to save config registers of connected PCIe devices. In the platform that I'm working on, there is a dependency of PCIe drive's working on I2C controller (because of the way PCIe power rails are controlled) and hence, by the time suspend_noirq() is called, I2C would have been disabled, hence I'm not supposed to use _noirq calls in this patch. Here is the call flow on how PCI_PM _noirq() call is invoked [] (pci_bus_read_config_dword+0x88/0x90) from [] (pci_save_state+0x30/0x174) [] (pci_save_state+0x30/0x174) from [] (pci_pm_suspend_noirq+0x23c/0x258) [] (pci_pm_suspend_noirq+0x23c/0x258) from [] (dpm_run_callback+0x34/0x54) [] (dpm_run_callback+0x34/0x54) from [] (dpm_suspend_end+0x29c/0x694) [] (dpm_suspend_end+0x29c/0x694) from [] (suspend_devices_and_enter+0x150/0x420) [] (suspend_devices_and_enter+0x150/0x420) from [] (pm_suspend+0x1d8/0x2a4) [] (pm_suspend+0x1d8/0x2a4) from [] (state_store+0x74/0xc4) [] (state_store+0x74/0xc4) from [] (kobj_attr_store+0x14/0x20) [] (kobj_attr_store+0x14/0x20) from [] (sysfs_write_file+0x170/0x1a0) [] (sysfs_write_file+0x170/0x1a0) from [] (vfs_write+0xbc/0x198) [] (vfs_write+0xbc/0x198) from [] (SyS_write+0x5c/0x16c) [] (SyS_write+0x5c/0x16c) from [] (ret_fast_syscall+0x0/0x30) Can someone help me understand why does PCI subsystem use suspend_noirq calls (pci_pm_suspend_noirq()) instead of normal suspend ? drivers/pci/host/pci-tegra.c | 111 ++++++++++++++++++++++++++++++++++++------- 1 file changed, 93 insertions(+), 18 deletions(-) -- 1.8.1.5 -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index 5ac9f06..0875a78 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -985,14 +985,21 @@ static void tegra_pcie_power_off(struct tegra_pcie *pcie) { int err; - /* TODO: disable and unprepare clocks? */ - err = phy_power_off(pcie->phy); if (err < 0) dev_warn(pcie->dev, "failed to power off PHY: %d\n", err); reset_control_assert(pcie->pcie_xrst); + + clk_disable_unprepare(pcie->pll_e); + + if (pcie->soc_data->has_cml_clk) + clk_disable_unprepare(pcie->cml_clk); + + clk_disable_unprepare(pcie->afi_clk); reset_control_assert(pcie->afi_rst); + + clk_disable_unprepare(pcie->pex_clk); reset_control_assert(pcie->pex_rst); tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); @@ -1126,7 +1133,7 @@ static int tegra_pcie_get_resources(struct tegra_pcie *pcie) } err = tegra_pcie_power_on(pcie); - if (err) { + if (err < 0) { dev_err(&pdev->dev, "failed to power up: %d\n", err); return err; } @@ -1329,14 +1336,11 @@ static const struct irq_domain_ops msi_domain_ops = { .map = tegra_msi_map, }; -static int tegra_pcie_enable_msi(struct tegra_pcie *pcie) +static int tegra_pcie_alloc_msi(struct tegra_pcie *pcie) { struct platform_device *pdev = to_platform_device(pcie->dev); - const struct tegra_pcie_soc_data *soc = pcie->soc_data; struct tegra_msi *msi = &pcie->msi; - unsigned long base; int err; - u32 reg; mutex_init(&msi->lock); @@ -1368,6 +1372,21 @@ static int tegra_pcie_enable_msi(struct tegra_pcie *pcie) /* setup AFI/FPCI range */ msi->pages = __get_free_pages(GFP_KERNEL, 0); + + return 0; + +err: + irq_domain_remove(msi->domain); + return err; +} + +static void tegra_pcie_enable_msi(struct tegra_pcie *pcie) +{ + const struct tegra_pcie_soc_data *soc = pcie->soc_data; + struct tegra_msi *msi = &pcie->msi; + unsigned long base; + u32 reg; + base = virt_to_phys((void *)msi->pages); afi_writel(pcie, base >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST); @@ -1389,12 +1408,6 @@ static int tegra_pcie_enable_msi(struct tegra_pcie *pcie) reg = afi_readl(pcie, AFI_INTR_MASK); reg |= AFI_INTR_MASK_MSI_MASK; afi_writel(pcie, reg, AFI_INTR_MASK); - - return 0; - -err: - irq_domain_remove(msi->domain); - return err; } static int tegra_pcie_disable_msi(struct tegra_pcie *pcie) @@ -1765,10 +1778,10 @@ retry: return false; } -static int tegra_pcie_enable(struct tegra_pcie *pcie) +static int tegra_pcie_check_ports(struct tegra_pcie *pcie) { struct tegra_pcie_port *port, *tmp; - struct hw_pci hw; + unsigned int num_ports = 0; list_for_each_entry_safe(port, tmp, &pcie->ports, list) { dev_info(pcie->dev, "probing port %u, using %u lanes\n", @@ -1776,8 +1789,10 @@ static int tegra_pcie_enable(struct tegra_pcie *pcie) tegra_pcie_port_enable(port); - if (tegra_pcie_port_check_link(port)) + if (tegra_pcie_port_check_link(port)) { + num_ports++; continue; + } dev_info(pcie->dev, "link %u down, ignoring\n", port->index); @@ -1785,6 +1800,16 @@ static int tegra_pcie_enable(struct tegra_pcie *pcie) tegra_pcie_port_free(port); } + return num_ports; +} + +static int tegra_pcie_enable(struct tegra_pcie *pcie) +{ + struct hw_pci hw; + + if (!tegra_pcie_check_ports(pcie)) + return -ENODEV; + memset(&hw, 0, sizeof(hw)); hw.nr_controllers = 1; @@ -2000,13 +2025,15 @@ static int tegra_pcie_probe(struct platform_device *pdev) tegra_pcie_setup_translations(pcie); if (IS_ENABLED(CONFIG_PCI_MSI)) { - err = tegra_pcie_enable_msi(pcie); + err = tegra_pcie_alloc_msi(pcie); if (err < 0) { dev_err(&pdev->dev, - "failed to enable MSI support: %d\n", + "failed to allocate MSI resources: %d\n", err); goto put_resources; } + + tegra_pcie_enable_msi(pcie); } err = tegra_pcie_enable(pcie); @@ -2062,10 +2089,58 @@ static int tegra_pcie_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM +static int tegra_pcie_suspend_noirq(struct device *dev) +{ + struct tegra_pcie *pcie = dev_get_drvdata(dev); + + tegra_pcie_power_off(pcie); + + return 0; +} + +static int tegra_pcie_resume_noirq(struct device *dev) +{ + struct tegra_pcie *pcie = dev_get_drvdata(dev); + int err; + + err = tegra_pcie_power_on(pcie); + if (err < 0) { + dev_err(dev, "failed to power on: %d\n", err); + return err; + } + + err = tegra_pcie_enable_controller(pcie); + if (err < 0) + goto poweroff; + + tegra_pcie_setup_translations(pcie); + + tegra_pcie_enable_msi(pcie); + + if (!tegra_pcie_check_ports(pcie)) + goto poweroff; + + return 0; + +poweroff: + tegra_pcie_power_off(pcie); + return err; +} + +static const struct dev_pm_ops tegra_pcie_pm_ops = { + .suspend_noirq = tegra_pcie_suspend_noirq, + .resume_noirq = tegra_pcie_resume_noirq, +}; +#else +#define tegra_pcie_pm_ops NULL +#endif /* CONFIG_PM */ + static struct platform_driver tegra_pcie_driver = { .driver = { .name = "tegra-pcie", .owner = THIS_MODULE, + .pm = &tegra_pcie_pm_ops, .of_match_table = tegra_pcie_of_match, }, .probe = tegra_pcie_probe,