From patchwork Tue Oct 28 11:54:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 5176081 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9F3E1C11AC for ; Tue, 28 Oct 2014 11:58:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D57B62024F for ; Tue, 28 Oct 2014 11:58:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0124C201F2 for ; Tue, 28 Oct 2014 11:58:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755576AbaJ1L5A (ORCPT ); Tue, 28 Oct 2014 07:57:00 -0400 Received: from mail-bl2on0116.outbound.protection.outlook.com ([65.55.169.116]:24113 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755346AbaJ1L44 (ORCPT ); Tue, 28 Oct 2014 07:56:56 -0400 Received: from BLUPR02CA029.namprd02.prod.outlook.com (25.160.23.147) by CO1PR02MB208.namprd02.prod.outlook.com (10.242.165.150) with Microsoft SMTP Server (TLS) id 15.1.6.9; Tue, 28 Oct 2014 11:56:54 +0000 Received: from BL2FFO11FD015.protection.gbl (2a01:111:f400:7c09::102) by BLUPR02CA029.outlook.office365.com (2a01:111:e400:8ad::19) with Microsoft SMTP Server (TLS) id 15.1.11.14 via Frontend Transport; Tue, 28 Oct 2014 11:56:53 +0000 Received: from atltwp02.amd.com (165.204.84.222) by BL2FFO11FD015.mail.protection.outlook.com (10.173.160.223) with Microsoft SMTP Server id 15.0.1049.20 via Frontend Transport; Tue, 28 Oct 2014 11:56:53 +0000 X-WSS-ID: 0NE5L6O-08-OCP-02 X-M-MSG: Received: from satlvexedge01.amd.com (satlvexedge01.amd.com [10.177.96.28]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by atltwp02.amd.com (Axway MailGate 5.3.1) with ESMTPS id 274E6D1600F; Tue, 28 Oct 2014 06:56:48 -0500 (CDT) Received: from SATLEXDAG02.amd.com (10.181.40.5) by satlvexedge01.amd.com (10.177.96.28) with Microsoft SMTP Server (TLS) id 14.3.195.1; Tue, 28 Oct 2014 06:57:05 -0500 Received: from SCYBEXDAG02.amd.com (10.34.11.12) by SATLEXDAG02.amd.com (10.181.40.5) with Microsoft SMTP Server (TLS) id 14.3.195.1; Tue, 28 Oct 2014 07:56:52 -0400 Received: from hr-ub.amd.com (10.237.75.143) by SCYBEXDAG02.amd.com (10.34.11.12) with Microsoft SMTP Server id 14.3.195.1; Tue, 28 Oct 2014 19:56:48 +0800 From: Huang Rui To: Felipe Balbi , Alan Stern , "Bjorn Helgaas" , Greg Kroah-Hartman CC: Paul Zimmerman , Heikki Krogerus , Jason Chang , "Vincent Wan" , Tony Li , , , , Huang Rui Subject: [PATCH v3 14/19] usb: dwc3: set SUSPHY bit for all cores Date: Tue, 28 Oct 2014 19:54:35 +0800 Message-ID: <1414497280-3126-15-git-send-email-ray.huang@amd.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414497280-3126-1-git-send-email-ray.huang@amd.com> References: <1414497280-3126-1-git-send-email-ray.huang@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:165.204.84.222; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(189002)(199003)(89996001)(31966008)(88136002)(64706001)(47776003)(4396001)(85852003)(50226001)(87286001)(33646002)(50986999)(104166001)(86362001)(93916002)(62966002)(77096002)(76482002)(101416001)(85306004)(76176999)(20776003)(92726001)(53416004)(92566001)(80022003)(46102003)(95666004)(21056001)(2171001)(97736003)(102836001)(87936001)(19580405001)(105586002)(107046002)(106466001)(50466002)(19580395003)(84676001)(48376002)(77156001)(120916001)(68736004)(44976005)(36756003)(229853001); DIR:OUT; SFP:1102; SCL:1; SRVR:CO1PR02MB208; H:atltwp02.amd.com; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:CO1PR02MB208; X-Exchange-Antispam-Report-Test: UriScan:; X-Forefront-PRVS: 0378F1E47A Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=Ray.Huang@amd.com; X-OriginatorOrg: amd4.onmicrosoft.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core initialization is completed above the dwc3 revision 1.94a. Signed-off-by: Huang Rui --- drivers/usb/dwc3/core.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index e36fcd0..7b5cd76 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -374,6 +374,15 @@ static void dwc3_phy_setup(struct dwc3 *dwc) reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); + /* + * Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY + * to '0' during coreConsultant configuration. So default value + * will be '0' when the core is reset. Application needs to set it + * to '1' after the core initialization is completed. + */ + if (dwc->revision > DWC3_REVISION_194A) + reg |= DWC3_GUSB3PIPECTL_SUSPHY; + if (dwc->u2ss_inp3_quirk) reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK; @@ -398,6 +407,21 @@ static void dwc3_phy_setup(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); mdelay(100); + + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); + + /* + * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to + * '0' during coreConsultant configuration. So default value will + * be '0' when the core is reset. Application needs to set it to + * '1' after the core initialization is completed. + */ + if (dwc->revision > DWC3_REVISION_194A) + reg |= DWC3_GUSB2PHYCFG_SUSPHY; + + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + + mdelay(100); } /**