From patchwork Thu Oct 30 10:08:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Rui X-Patchwork-Id: 5195161 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B13BC9F349 for ; Thu, 30 Oct 2014 10:14:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DDB8420254 for ; Thu, 30 Oct 2014 10:14:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EC5882011B for ; Thu, 30 Oct 2014 10:14:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758725AbaJ3KOd (ORCPT ); Thu, 30 Oct 2014 06:14:33 -0400 Received: from mail-bn1on0111.outbound.protection.outlook.com ([157.56.110.111]:29824 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S933367AbaJ3KLO (ORCPT ); Thu, 30 Oct 2014 06:11:14 -0400 Received: from BLUPR02CA039.namprd02.prod.outlook.com (25.160.23.157) by BN1PR02MB199.namprd02.prod.outlook.com (10.242.214.154) with Microsoft SMTP Server (TLS) id 15.1.6.9; Thu, 30 Oct 2014 10:11:11 +0000 Received: from BL2FFO11FD019.protection.gbl (2a01:111:f400:7c09::158) by BLUPR02CA039.outlook.office365.com (2a01:111:e400:8ad::29) with Microsoft SMTP Server (TLS) id 15.1.11.14 via Frontend Transport; Thu, 30 Oct 2014 10:11:11 +0000 Received: from atltwp02.amd.com (165.204.84.222) by BL2FFO11FD019.mail.protection.outlook.com (10.173.161.37) with Microsoft SMTP Server id 15.0.1049.20 via Frontend Transport; Thu, 30 Oct 2014 10:11:10 +0000 X-WSS-ID: 0NE95MI-08-IAR-02 X-M-MSG: Received: from satlvexedge01.amd.com (satlvexedge01.amd.com [10.177.96.28]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by atltwp02.amd.com (Axway MailGate 5.3.1) with ESMTPS id 22CD7BD866D; Thu, 30 Oct 2014 05:11:06 -0500 (CDT) Received: from SATLEXDAG01.amd.com (10.181.40.3) by satlvexedge01.amd.com (10.177.96.28) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 30 Oct 2014 05:11:23 -0500 Received: from SCYBEXDAG03.amd.com (10.34.11.13) by SATLEXDAG01.amd.com (10.181.40.3) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 30 Oct 2014 06:11:08 -0400 Received: from hr-ub.amd.com (10.237.75.143) by SCYBEXDAG03.amd.com (10.34.11.13) with Microsoft SMTP Server id 14.3.195.1; Thu, 30 Oct 2014 18:11:05 +0800 From: Huang Rui To: Felipe Balbi , Alan Stern , "Bjorn Helgaas" , Greg Kroah-Hartman CC: Paul Zimmerman , Heikki Krogerus , Sergei Shtylyov , Jason Chang , Vincent Wan , Tony Li , , , , , Huang Rui Subject: [PATCH v4 13/20] usb: dwc3: set SUSPHY bit for all cores Date: Thu, 30 Oct 2014 18:08:38 +0800 Message-ID: <1414663725-2195-14-git-send-email-ray.huang@amd.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414663725-2195-1-git-send-email-ray.huang@amd.com> References: <1414663725-2195-1-git-send-email-ray.huang@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:165.204.84.222; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(189002)(199003)(50986999)(86362001)(62966002)(36756003)(48376002)(575784001)(97736003)(21056001)(19580405001)(44976005)(46102003)(80022003)(19580395003)(92566001)(50466002)(68736004)(76176999)(64706001)(47776003)(85852003)(20776003)(89996001)(104166001)(50226001)(87286001)(88136002)(87936001)(4396001)(77156001)(2171001)(84676001)(93916002)(92726001)(31966008)(106466001)(95666004)(101416001)(107046002)(33646002)(229853001)(85306004)(76482002)(99396003)(120916001)(53416004)(105586002)(77096002)(102836001); DIR:OUT; SFP:1102; SCL:1; SRVR:BN1PR02MB199; H:atltwp02.amd.com; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BN1PR02MB199; X-Forefront-PRVS: 038002787A Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=Ray.Huang@amd.com; X-OriginatorOrg: amd4.onmicrosoft.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core initialization is completed above the dwc3 revision 1.94a. Signed-off-by: Huang Rui Signed-off-by: Felipe Balbi --- drivers/usb/dwc3/core.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 11b0ab08..e02c3b0 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -374,6 +374,15 @@ static void dwc3_phy_setup(struct dwc3 *dwc) reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); + /* + * Above 1.94a, it is recommended to set DWC3_GUSB3PIPECTL_SUSPHY + * to '0' during coreConsultant configuration. So default value + * will be '0' when the core is reset. Application needs to set it + * to '1' after the core initialization is completed. + */ + if (dwc->revision > DWC3_REVISION_194A) + reg |= DWC3_GUSB3PIPECTL_SUSPHY; + if (dwc->u2ss_inp3_quirk) reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK; @@ -395,6 +404,21 @@ static void dwc3_phy_setup(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); mdelay(100); + + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); + + /* + * Above 1.94a, it is recommended to set DWC3_GUSB2PHYCFG_SUSPHY to + * '0' during coreConsultant configuration. So default value will + * be '0' when the core is reset. Application needs to set it to + * '1' after the core initialization is completed. + */ + if (dwc->revision > DWC3_REVISION_194A) + reg |= DWC3_GUSB2PHYCFG_SUSPHY; + + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + + mdelay(100); } /**