diff mbox

[v3,2/5] Numachip: Elide self-IPI ICR polling

Message ID 1414915813-2462-2-git-send-email-daniel@numascale.com (mailing list archive)
State New, archived
Headers show

Commit Message

Daniel J Blueman Nov. 2, 2014, 8:10 a.m. UTC
The default self-IPI path polls the ICR to delay sending the IPI until
there is no IPI in progress. This is redundant on x86-86 APICs, since
IPIs are queued. See the AMD64 Architecture Programmer's Manual, vol 2,

Signed-off-by: Daniel J Blueman <daniel@numascale.com>
 arch/x86/kernel/apic/apic_numachip.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox


diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index 81d70ba..bd083c0 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -145,7 +145,7 @@  static void numachip_send_IPI_all(int vector)
 static void numachip_send_IPI_self(int vector)
-	__default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
+	apic_write(APIC_SELF_IPI, vector);
 static int __init numachip_probe(void)