From patchwork Tue Jan 13 19:57:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 5623941 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 24608C058D for ; Tue, 13 Jan 2015 19:57:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2AD1020389 for ; Tue, 13 Jan 2015 19:57:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 49B0120374 for ; Tue, 13 Jan 2015 19:57:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752646AbbAMT5c (ORCPT ); Tue, 13 Jan 2015 14:57:32 -0500 Received: from metis.ext.pengutronix.de ([92.198.50.35]:35237 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752138AbbAMT5b (ORCPT ); Tue, 13 Jan 2015 14:57:31 -0500 Received: from dude.hi.4.pengutronix.de ([10.1.0.7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1YB7ai-0007vp-Jo; Tue, 13 Jan 2015 20:57:28 +0100 From: Lucas Stach To: Thierry Reding , Bjorn Helgaas Cc: linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v3 2/2] PCI: tegra: apply relaxed ordering fixup only on Tegra Date: Tue, 13 Jan 2015 20:57:28 +0100 Message-Id: <1421179048-25370-2-git-send-email-l.stach@pengutronix.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1421179048-25370-1-git-send-email-l.stach@pengutronix.de> References: <1421179048-25370-1-git-send-email-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-pci@vger.kernel.org Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The fixup to enable relaxed ordering on all PCI devices was executed unconditionally if the Tegra PCI host driver was built into the kernel. This doesn't play nice with a multiplatform kernel executed on other platforms which may not need this fixup. Make sure to only apply the fixup if the root port is a Tegra. Signed-off-by: Lucas Stach Acked-by: Thierry Reding --- v2: - split out PCI hierarchy walk - separate code from data by moving PCI IDs into own structure v3: - fixup for helper rename - applied Thierry's ACK --- drivers/pci/host/pci-tegra.c | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index 6f9c29fa70e7..e87d79559723 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -635,10 +635,42 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0bf1, tegra_pcie_fixup_class); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e1c, tegra_pcie_fixup_class); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA, 0x0e1d, tegra_pcie_fixup_class); +static const struct pci_device_id tegra_rootport_ids[] = { + { + /* Tegra20 4 lane root port */ + .vendor = PCI_VENDOR_ID_NVIDIA, .device = 0x0bf0, + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + }, { + /* Tegra20 2 lane root port */ + .vendor = PCI_VENDOR_ID_NVIDIA, .device = 0x0bf1, + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + }, { + /* Tegra30 4 lane root port */ + .vendor = PCI_VENDOR_ID_NVIDIA, .device = 0x0e1c, + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + }, { + /* Tegra30 2 lane root port */ + .vendor = PCI_VENDOR_ID_NVIDIA, .device = 0x0e1d, + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + }, { + /* Tegra124 4 lane root port */ + .vendor = PCI_VENDOR_ID_NVIDIA, .device = 0x0e12, + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + }, { + /* Tegra124 1 lane root port */ + .vendor = PCI_VENDOR_ID_NVIDIA, .device = 0x0e13, + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID + }, { + /* sentinel */ + } +}; + /* Tegra PCIE requires relaxed ordering */ static void tegra_pcie_relax_enable(struct pci_dev *dev) { - pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN); + if (pci_match_id(tegra_rootport_ids, pci_find_root_port(dev))) + pcie_capability_set_word(dev, PCI_EXP_DEVCTL, + PCI_EXP_DEVCTL_RELAX_EN); } DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, tegra_pcie_relax_enable);