From patchwork Thu Feb 26 08:12:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 5889021 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 12D909F269 for ; Thu, 26 Feb 2015 08:16:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D421E20397 for ; Thu, 26 Feb 2015 08:16:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 49E8F202A1 for ; Thu, 26 Feb 2015 08:16:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932083AbbBZIPv (ORCPT ); Thu, 26 Feb 2015 03:15:51 -0500 Received: from szxga03-in.huawei.com ([119.145.14.66]:60794 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753613AbbBZIPr (ORCPT ); Thu, 26 Feb 2015 03:15:47 -0500 Received: from 172.24.2.119 (EHLO szxeml433-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BCI61025; Thu, 26 Feb 2015 16:15:41 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml433-hub.china.huawei.com (10.82.67.210) with Microsoft SMTP Server id 14.3.158.1; Thu, 26 Feb 2015 16:15:21 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Jiang Liu , , Yinghai Lu , , Marc Zyngier , , Russell King , , Thomas Gleixner , Benjamin Herrenschmidt , Rusty Russell , Tony Luck , , "David S. Miller" , "Guan Xuetao" , , , Liviu Dudau , "Arnd Bergmann" , Geert Uytterhoeven , "Yijing Wang" , Subject: [PATCH v4 18/30] PCI/powerpc: Use pci_scan_root_bridge() for simplicity Date: Thu, 26 Feb 2015 16:12:12 +0800 Message-ID: <1424938344-4017-19-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1424938344-4017-1-git-send-email-wangyijing@huawei.com> References: <1424938344-4017-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.54EED62E.0083, ss=1, re=0.001, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: a21dde05767b578aea36c3311dfd5afb Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now we could use pci_scan_root_bridge() to scan pci buses, provide powerpc specific pci_host_bridge_ops. Suggested-by: Arnd Bergmann Signed-off-by: Yijing Wang CC: Benjamin Herrenschmidt CC: linuxppc-dev@lists.ozlabs.org --- arch/powerpc/include/asm/machdep.h | 2 +- arch/powerpc/kernel/pci-common.c | 63 +++++++++++++++++------------- arch/powerpc/platforms/pseries/pci.c | 8 ++-- arch/powerpc/platforms/pseries/pseries.h | 2 +- 4 files changed, 42 insertions(+), 33 deletions(-) diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index 8e7f2a8..b811d12 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h @@ -129,7 +129,7 @@ struct machdep_calls { void (*pcibios_fixup)(void); int (*pci_probe_mode)(struct pci_bus *); void (*pci_irq_fixup)(struct pci_dev *dev); - int (*pcibios_set_root_bus_speed)(struct pci_host_bridge + void (*pcibios_set_root_bus_speed)(struct pci_host_bridge *bridge); /* To setup PHBs when using automatic OF platform driver for PCI */ diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 4401b6a..48a6cff 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -767,14 +767,33 @@ int pci_proc_domain(struct pci_bus *bus) return 1; } -int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) +static void pci_host_bridge_set_root_bus_speed( + struct pci_host_bridge *bridge) { if (ppc_md.pcibios_set_root_bus_speed) - return ppc_md.pcibios_set_root_bus_speed(bridge); - - return 0; + ppc_md.pcibios_set_root_bus_speed(bridge); } +static void pci_host_bridge_of_scan_bus(struct pci_host_bridge *host) +{ + int mode = PCI_PROBE_NORMAL; + struct pci_bus *bus = host->bus; + struct pci_controller *hose = dev_get_drvdata(&host->dev); + + /* Get probe mode and perform scan */ + if (hose->dn && ppc_md.pci_probe_mode) + mode = ppc_md.pci_probe_mode(bus); + + pr_debug(" probe mode: %d\n", mode); + if (mode == PCI_PROBE_DEVTREE) + of_scan_bus(hose->dn, bus); + + if (mode == PCI_PROBE_NORMAL) { + pci_bus_update_busn_res_end(bus, 255); + hose->last_busno = pci_scan_child_bus(bus); + pci_bus_update_busn_res_end(bus, hose->last_busno); + } +} /* This header fixup will do the resource fixup for all devices as they are * probed, but not for bridge ranges */ @@ -1587,6 +1606,11 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) return of_node_get(hose->dn); } +static struct pci_host_bridge_ops phb_ops = { + .phb_set_root_bus_speed = pci_host_bridge_set_root_bus_speed, + .phb_of_scan_bus = pci_host_bridge_of_scan_bus, +}; + /** * pci_scan_phb - Given a pci_controller, setup and scan the PCI bus * @hose: Pointer to the PCI host controller instance structure @@ -1594,9 +1618,8 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) void pcibios_scan_phb(struct pci_controller *hose) { LIST_HEAD(resources); - struct pci_bus *bus; + struct pci_host_bridge *host; struct device_node *node = hose->dn; - int mode; pr_debug("PCI: Scanning PHB %s\n", of_node_full_name(node)); @@ -1612,30 +1635,16 @@ void pcibios_scan_phb(struct pci_controller *hose) pci_add_resource(&resources, &hose->busn); /* Create an empty bus for the toplevel */ - bus = pci_create_root_bus(hose->parent, + host = pci_scan_root_bridge(hose->parent, PCI_DOMBUS(hose->global_number, hose->first_busno), - hose->ops, hose, &resources); - if (bus == NULL) { - pr_err("Failed to create bus for PCI domain %04x\n", + hose->ops, hose, &resources, &phb_ops); + if (host == NULL) { + pr_err("Failed to create host bridge for PCI domain %04x\n", hose->global_number); pci_free_resource_list(&resources); return; } - hose->bus = bus; - - /* Get probe mode and perform scan */ - mode = PCI_PROBE_NORMAL; - if (node && ppc_md.pci_probe_mode) - mode = ppc_md.pci_probe_mode(bus); - pr_debug(" probe mode: %d\n", mode); - if (mode == PCI_PROBE_DEVTREE) - of_scan_bus(node, bus); - - if (mode == PCI_PROBE_NORMAL) { - pci_bus_update_busn_res_end(bus, 255); - hose->last_busno = pci_scan_child_bus(bus); - pci_bus_update_busn_res_end(bus, hose->last_busno); - } + hose->bus = host->bus; /* Platform gets a chance to do some global fixups before * we proceed to resource allocation @@ -1644,9 +1653,9 @@ void pcibios_scan_phb(struct pci_controller *hose) ppc_md.pcibios_fixup_phb(hose); /* Configure PCI Express settings */ - if (bus && !pci_has_flag(PCI_PROBE_ONLY)) { + if (host->bus && !pci_has_flag(PCI_PROBE_ONLY)) { struct pci_bus *child; - list_for_each_entry(child, &bus->children, node) + list_for_each_entry(child, &host->bus->children, node) pcie_bus_configure_settings(child); } } diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index af685d6..89ff79c 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c @@ -110,7 +110,7 @@ static void fixup_winbond_82c105(struct pci_dev* dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, fixup_winbond_82c105); -int pseries_set_root_bus_speed(struct pci_host_bridge *bridge) +void pseries_set_root_bus_speed(struct pci_host_bridge *bridge) { struct device_node *dn, *pdn; struct pci_bus *bus; @@ -121,7 +121,7 @@ int pseries_set_root_bus_speed(struct pci_host_bridge *bridge) dn = pcibios_get_phb_of_node(bus); if (!dn) - return 0; + return; for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { rc = of_property_read_u32_array(pdn, @@ -135,7 +135,7 @@ int pseries_set_root_bus_speed(struct pci_host_bridge *bridge) if (rc) { pr_debug("no ibm,pcie-link-speed-stats property\n"); - return 0; + return; } switch (pcie_link_speed_stats[0]) { @@ -168,5 +168,5 @@ int pseries_set_root_bus_speed(struct pci_host_bridge *bridge) break; } - return 0; + return; } diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h index 5d0be3a..9aa9c13 100644 --- a/arch/powerpc/platforms/pseries/pseries.h +++ b/arch/powerpc/platforms/pseries/pseries.h @@ -63,7 +63,7 @@ extern int dlpar_detach_node(struct device_node *); /* PCI root bridge prepare function override for pseries */ struct pci_host_bridge; -int pseries_set_root_bus_speed(struct pci_host_bridge *bridge); +void pseries_set_root_bus_speed(struct pci_host_bridge *bridge); unsigned long pseries_memory_block_size(void);