From patchwork Mon Mar 23 12:40:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yijing Wang X-Patchwork-Id: 6072891 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BAA889F318 for ; Mon, 23 Mar 2015 12:53:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CCEB12024C for ; Mon, 23 Mar 2015 12:53:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2457E2025A for ; Mon, 23 Mar 2015 12:53:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752500AbbCWMwI (ORCPT ); Mon, 23 Mar 2015 08:52:08 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:54046 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752362AbbCWMoP (ORCPT ); Mon, 23 Mar 2015 08:44:15 -0400 Received: from 172.24.2.119 (EHLO szxeml434-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CIW12389; Mon, 23 Mar 2015 20:44:05 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml434-hub.china.huawei.com (10.82.67.225) with Microsoft SMTP Server id 14.3.158.1; Mon, 23 Mar 2015 20:43:52 +0800 From: Yijing Wang To: Bjorn Helgaas CC: Jiang Liu , , Yinghai Lu , , Marc Zyngier , , Russell King , , Thomas Gleixner , Benjamin Herrenschmidt , Rusty Russell , Tony Luck , , "David S. Miller" , "Guan Xuetao" , , , Liviu Dudau , "Arnd Bergmann" , Geert Uytterhoeven , "Yijing Wang" Subject: [PATCH v7 12/31] powerpc/PCI: Rename pcibios_root_bridge_prepare() to pcibios_set_root_bus_speed() Date: Mon, 23 Mar 2015 20:40:38 +0800 Message-ID: <1427114457-16687-13-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1427114457-16687-1-git-send-email-wangyijing@huawei.com> References: <1427114457-16687-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP pcibios_root_bridge_prepare() in powerpc set root bus speed, it's not the preparation for pci host bridge. Rename it for better readability, and we could move pcibios_root_bridge_prepare() to pci_create_host_bridge(), in which root bus is not created. We will clean up these weak functions, and add pci_host_bridge_ops to do the same thing in later patch. Signed-off-by: Yijing Wang --- arch/powerpc/include/asm/machdep.h | 2 +- arch/powerpc/kernel/pci-common.c | 8 +++----- arch/powerpc/platforms/pseries/pci.c | 8 ++++---- arch/powerpc/platforms/pseries/setup.c | 2 +- drivers/pci/probe.c | 5 +++++ 5 files changed, 14 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index c8175a3..b811d12 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h @@ -129,7 +129,7 @@ struct machdep_calls { void (*pcibios_fixup)(void); int (*pci_probe_mode)(struct pci_bus *); void (*pci_irq_fixup)(struct pci_dev *dev); - int (*pcibios_root_bridge_prepare)(struct pci_host_bridge + void (*pcibios_set_root_bus_speed)(struct pci_host_bridge *bridge); /* To setup PHBs when using automatic OF platform driver for PCI */ diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 9913f6c..2c58200 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -767,12 +767,10 @@ int pci_proc_domain(struct pci_bus *bus) return 1; } -int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) +void pcibios_set_root_bus_speed(struct pci_host_bridge *bridge) { - if (ppc_md.pcibios_root_bridge_prepare) - return ppc_md.pcibios_root_bridge_prepare(bridge); - - return 0; + if (ppc_md.pcibios_set_root_bus_speed) + return ppc_md.pcibios_set_root_bus_speed(bridge); } /* This header fixup will do the resource fixup for all devices as they are diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index fe16a50..89ff79c 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c @@ -110,7 +110,7 @@ static void fixup_winbond_82c105(struct pci_dev* dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, fixup_winbond_82c105); -int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) +void pseries_set_root_bus_speed(struct pci_host_bridge *bridge) { struct device_node *dn, *pdn; struct pci_bus *bus; @@ -121,7 +121,7 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) dn = pcibios_get_phb_of_node(bus); if (!dn) - return 0; + return; for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { rc = of_property_read_u32_array(pdn, @@ -135,7 +135,7 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) if (rc) { pr_debug("no ibm,pcie-link-speed-stats property\n"); - return 0; + return; } switch (pcie_link_speed_stats[0]) { @@ -168,5 +168,5 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) break; } - return 0; + return; } diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index e445b67..b196c0d 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -496,7 +496,7 @@ static void __init pSeries_setup_arch(void) ppc_md.enable_pmcs = power4_enable_pmcs; } - ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; + ppc_md.pcibios_set_root_bus_speed = pseries_set_root_bus_speed; if (firmware_has_feature(FW_FEATURE_SET_MODE)) { long rc; diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 0ac2bf6..418a426 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1856,6 +1856,10 @@ int __weak pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) return 0; } +void __weak pcibios_set_root_bus_speed(struct pci_host_bridge *bridge) +{ +} + void __weak pcibios_add_bus(struct pci_bus *bus) { } @@ -1893,6 +1897,7 @@ static struct pci_bus *__pci_create_root_bus( if (error) goto put_dev; + pcibios_set_root_bus_speed(bridge); device_enable_async_suspend(b->bridge); pci_set_bus_of_node(b);