From patchwork Wed Jul 8 11:14:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 6745891 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5432E9F2F0 for ; Wed, 8 Jul 2015 11:20:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8757B206F0 for ; Wed, 8 Jul 2015 11:20:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A1E7B206DF for ; Wed, 8 Jul 2015 11:20:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933123AbbGHLTy (ORCPT ); Wed, 8 Jul 2015 07:19:54 -0400 Received: from mga14.intel.com ([192.55.52.115]:17970 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758723AbbGHLO0 (ORCPT ); Wed, 8 Jul 2015 07:14:26 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 08 Jul 2015 04:14:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,431,1432623600"; d="scan'208";a="742896189" Received: from black.fi.intel.com ([10.237.72.82]) by fmsmga001.fm.intel.com with ESMTP; 08 Jul 2015 04:14:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id D5C9F1BC; Wed, 8 Jul 2015 14:14:19 +0300 (EEST) From: Andy Shevchenko To: linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-pci@vger.kernel.org, Thomas Gleixner , Ingo Molnar , x86@kernel.org Cc: Andy Shevchenko Subject: [PATCH v2 1/3] x86/pci/intel_mid_pci: work around for IRQ0 assignment Date: Wed, 8 Jul 2015 14:14:17 +0300 Message-Id: <1436354059-130135-2-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1436354059-130135-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1436354059-130135-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A few devices on Intel Edison board (Intel Tangier) has IRQ0 as an IRQ line in the PCI configuration. The actual one which is using that is a first eMMC host controller. In case we compile sdhci-pci as a module and leave serial driver built-in, first serial device not in use and has IRQ0 assigned as well, the latter takes the interrupt allocation. The result of such behaviour is impossibility to allocate the interrupt by sdhci-pci driver. This patch introduces a quirk inside intel_mid_pci_irq_enable() to avoid described behaviour. Fixes: 90b9aacf912a (serial: 8250_pci: add Intel Tangier support) Signed-off-by: Andy Shevchenko --- arch/x86/pci/intel_mid_pci.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c index 2706230..5d7f4afe 100644 --- a/arch/x86/pci/intel_mid_pci.c +++ b/arch/x86/pci/intel_mid_pci.c @@ -206,6 +206,8 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, where, size, value); } +#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 + static int intel_mid_pci_irq_enable(struct pci_dev *dev) { struct irq_alloc_info info; @@ -214,6 +216,22 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) if (dev->irq_managed && dev->irq > 0) return 0; + /* Special treatment for IRQ0 */ + if (dev->irq == 0) { + switch (intel_mid_identify_cpu()) { + case INTEL_MID_CPU_CHIP_TANGIER: + /* + * TNG has IRQ0 assigned to eMMC controller. This makes + * it happy to get an interrupt. + */ + if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC) + return -EBUSY; + break; + default: + break; + } + } + if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER) polarity = 0; /* active high */ else