From patchwork Tue Jul 14 22:47:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yinghai Lu X-Patchwork-Id: 6789871 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4CD819F380 for ; Tue, 14 Jul 2015 22:55:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3204D2073F for ; Tue, 14 Jul 2015 22:55:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EA38720585 for ; Tue, 14 Jul 2015 22:55:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752304AbbGNWyt (ORCPT ); Tue, 14 Jul 2015 18:54:49 -0400 Received: from userp1040.oracle.com ([156.151.31.81]:36887 "EHLO userp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754095AbbGNWxN (ORCPT ); Tue, 14 Jul 2015 18:53:13 -0400 Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by userp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id t6EMm0m1012754 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 14 Jul 2015 22:48:00 GMT Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0021.oracle.com (8.13.8/8.13.8) with ESMTP id t6EMm0HK029621 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Tue, 14 Jul 2015 22:48:00 GMT Received: from abhmp0014.oracle.com (abhmp0014.oracle.com [141.146.116.20]) by aserv0122.oracle.com (8.13.8/8.13.8) with ESMTP id t6EMm0TR020113; Tue, 14 Jul 2015 22:48:00 GMT Received: from linux-siqj.site.us.oracle.com (/10.132.127.48) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 14 Jul 2015 15:48:00 -0700 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Wei Yang , TJ , Yijing Wang Cc: Andrew Morton , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu Subject: [PATCH v2 49/49] PCI: Don't set flags to 0 when assign resource fail Date: Tue, 14 Jul 2015 15:47:20 -0700 Message-Id: <1436914040-13206-50-git-send-email-yinghai@kernel.org> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1436914040-13206-1-git-send-email-yinghai@kernel.org> References: <1436914040-13206-1-git-send-email-yinghai@kernel.org> X-Source-IP: aserv0021.oracle.com [141.146.126.233] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP make flags take IORESOURCE_UNSET | IORESOURCE_DISABLED instead. Signed-off-by: Yinghai Lu --- drivers/pci/bus.c | 2 +- drivers/pci/setup-bus.c | 45 +++++++++++++++++++++++---------------------- drivers/pci/setup-res.c | 3 ++- 3 files changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index b043bdf..b68f1cd 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -140,7 +140,7 @@ static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res, type_mask |= IORESOURCE_TYPE_BITS; pci_bus_for_each_resource(bus, r, i) { - if (!r) + if (!r || resource_disabled(r)) continue; /* type_mask must match */ diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 7734be6..a7fbdcc 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -289,13 +289,6 @@ static void __dev_check_resources(struct pci_dev *dev, pdev_check_resources(dev, realloc_head, head); } -static inline void reset_resource(struct resource *res) -{ - res->start = 0; - res->end = 0; - res->flags = 0; -} - static void __sort_resources(struct list_head *head) { struct pci_dev_resource *res1, *tmp_res, *res2; @@ -398,7 +391,7 @@ static void reassign_resources_sorted(struct list_head *realloc_head, res->start = align; res->end = res->start + add_size - 1; if (pci_assign_resource(add_res->dev, idx)) - reset_resource(res); + res->flags |= IORESOURCE_DISABLED; } else { /* could just assigned with alt, add difference ? */ resource_size_t must_size; @@ -451,7 +444,7 @@ static void assign_requested_resources_sorted(struct list_head *head, pci_assign_resource(dev_res->dev, idx)) { if (fail_head) add_to_list(fail_head, dev_res->dev, res); - reset_resource(res); + res->flags |= IORESOURCE_DISABLED; } } } @@ -737,7 +730,7 @@ static void __assign_resources_alt_sorted(struct list_head *head, if (!res_to_dev_res(local_fail_head, res)) add_to_list(local_fail_head, fail_res->dev, res); - reset_resource(res); + res->flags |= IORESOURCE_DISABLED; } free_list(&local_alt_fail_head); } @@ -903,7 +896,7 @@ static void pci_setup_bridge_io(struct pci_dev *bridge) /* Set up the top and bottom of the PCI I/O segment for this bus. */ res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0]; pcibios_resource_to_bus(bridge->bus, ®ion, res); - if (res->flags & IORESOURCE_IO) { + if ((res->flags & IORESOURCE_IO) && !(res->flags & IORESOURCE_UNSET)) { pci_read_config_word(bridge, PCI_IO_BASE, &l); io_base_lo = (region.start >> 8) & io_mask; io_limit_lo = (region.end >> 8) & io_mask; @@ -933,7 +926,8 @@ static void pci_setup_bridge_mmio(struct pci_dev *bridge) /* Set up the top and bottom of the PCI Memory segment for this bus. */ res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1]; pcibios_resource_to_bus(bridge->bus, ®ion, res); - if (res->flags & IORESOURCE_MEM) { + if ((res->flags & IORESOURCE_MEM) && + !(res->flags & IORESOURCE_UNSET)) { l = (region.start >> 16) & 0xfff0; l |= region.end & 0xfff00000; dev_info(&bridge->dev, " bridge window %pR\n", res); @@ -958,7 +952,8 @@ static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge) bu = lu = 0; res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2]; pcibios_resource_to_bus(bridge->bus, ®ion, res); - if (res->flags & IORESOURCE_PREFETCH) { + if ((res->flags & IORESOURCE_PREFETCH) && + !(res->flags & IORESOURCE_UNSET)) { l = (region.start >> 16) & 0xfff0; l |= region.end & 0xfff00000; if (res->flags & IORESOURCE_MEM_64) { @@ -1077,6 +1072,7 @@ static void pci_bridge_check_ranges(struct pci_bus *bus) b_res = &bridge->resource[PCI_BRIDGE_RESOURCES]; b_res[1].flags |= IORESOURCE_MEM; + b_res[1].flags &= ~IORESOURCE_DISABLED; pci_read_config_word(bridge, PCI_IO_BASE, &io); if (!io) { @@ -1084,8 +1080,10 @@ static void pci_bridge_check_ranges(struct pci_bus *bus) pci_read_config_word(bridge, PCI_IO_BASE, &io); pci_write_config_word(bridge, PCI_IO_BASE, 0x0); } - if (io) + if (io) { b_res[0].flags |= IORESOURCE_IO; + b_res[0].flags &= ~IORESOURCE_DISABLED; + } /* DECchip 21050 pass 2 errata: the bridge may miss an address disconnect boundary by one PCI data phase. @@ -1102,6 +1100,7 @@ static void pci_bridge_check_ranges(struct pci_bus *bus) } if (pmem) { b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; + b_res[2].flags &= ~IORESOURCE_DISABLED; if ((pmem & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) { b_res[2].flags |= IORESOURCE_MEM_64; @@ -1247,8 +1246,10 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, struct resource *r = &dev->resource[i]; unsigned long r_size, r_add_size; - if (r->parent || !(r->flags & IORESOURCE_IO)) + if (r->parent || !(r->flags & IORESOURCE_IO) || + resource_disabled(r)) continue; + r_size = resource_size(r); if (r_size < 0x400) @@ -1289,7 +1290,7 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, if (b_res->start || b_res->end) dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n", b_res, &bus->busn_res); - b_res->flags = 0; + b_res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; return; } @@ -1563,7 +1564,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, if (r->parent || ((flags & mask) != type && (flags & mask) != type2 && - (flags & mask) != type3)) + (flags & mask) != type3) || + resource_disabled(r)) continue; r_size = resource_size(r); @@ -1584,7 +1586,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, if (align > (1ULL<<37)) { /*128 Gb*/ dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n", i, r, (unsigned long long) align); - r->flags = 0; + r->flags |= IORESOURCE_UNSET | + IORESOURCE_DISABLED; continue; } @@ -1671,7 +1674,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, if (b_res->start || b_res->end) dev_info(&bus->self->dev, "disabling bridge window %pR to %pR (unused)\n", b_res, &bus->busn_res); - b_res->flags = 0; + b_res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; return 0; } b_res->start = min_align; @@ -2076,7 +2079,7 @@ static void pci_bridge_release_resources(struct pci_bus *bus, /* keep the old size */ r->end = resource_size(r) - 1; r->start = 0; - r->flags = 0; + r->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED; /* avoiding touch the one without PREF */ if (type & IORESOURCE_PREFETCH) @@ -2334,7 +2337,6 @@ again: restore_resource(fail_res, res); if (fail_res->dev->subordinate) { - res->flags = 0; /* last or third times and later */ if (tried_times + 1 == pci_try_num || tried_times + 1 > 2) { @@ -2420,7 +2422,6 @@ again: restore_resource(fail_res, res); if (fail_res->dev->subordinate) { - res->flags = 0; /* last time */ res->start = 0; res->end = res->start - 1; diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 55caf7a..d17f23c 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -364,7 +364,8 @@ int pci_enable_resources(struct pci_dev *dev, int mask) r = &dev->resource[i]; - if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) + if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)) || + resource_disabled(r)) continue; if ((i == PCI_ROM_RESOURCE) && (!(r->flags & IORESOURCE_ROM_ENABLE)))