From patchwork Mon Aug 17 11:55:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Wang X-Patchwork-Id: 7024671 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D3F8CC05AC for ; Mon, 17 Aug 2015 11:50:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F007720600 for ; Mon, 17 Aug 2015 11:50:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BFA75205F5 for ; Mon, 17 Aug 2015 11:50:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755213AbbHQLuq (ORCPT ); Mon, 17 Aug 2015 07:50:46 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:60248 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753738AbbHQLup (ORCPT ); Mon, 17 Aug 2015 07:50:45 -0400 Received: from 172.24.1.48 (EHLO szxeml430-hub.china.huawei.com) ([172.24.1.48]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CTF26641; Mon, 17 Aug 2015 19:50:21 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by szxeml430-hub.china.huawei.com (10.82.67.185) with Microsoft SMTP Server id 14.3.235.1; Mon, 17 Aug 2015 19:50:10 +0800 From: Zhou Wang To: Bjorn Helgaas , , "Pratyush Anand" , Arnd Bergmann , , , , , , , , CC: , , , , , , , , , , Subject: [PATCH v7 2/6] ARM/PCI: remove align_resource in pci_sys_data Date: Mon, 17 Aug 2015 19:55:50 +0800 Message-ID: <1439812554-180426-3-git-send-email-wangzhou1@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1439812554-180426-1-git-send-email-wangzhou1@hisilicon.com> References: <1439812554-180426-1-git-send-email-wangzhou1@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: gabriele paoloni This patch is needed in order to unify the PCIe designware framework for ARM and ARM64 architectures. In the PCIe designware unification process we are calling pci_create_root_bus() passing a "sysdata" parameter that is the same for both ARM and ARM64 and is of type "struct pcie_port*". In the ARM case this will cause a problem with the function pcibios_align_resource(); in fact this will cast "dev->sysdata" to "struct pci_sys_data*", whereas designware had passed a "struct pcie_port*" pointer. This patch solves the issue by removing "align_resource" from "pci_sys_data" struct and defining a static global function pointer in "bios32.c" Signed-off-by: Gabriele Paoloni Acked-by: Pratyush Anand --- arch/arm/include/asm/mach/pci.h | 5 ----- arch/arm/kernel/bios32.c | 12 ++++++++---- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h index 28b9bb3..8a4e4de 100644 --- a/arch/arm/include/asm/mach/pci.h +++ b/arch/arm/include/asm/mach/pci.h @@ -58,11 +58,6 @@ struct pci_sys_data { /* IRQ mapping */ int (*map_irq)(const struct pci_dev *, u8, u8); /* Resource alignement requirements */ - resource_size_t (*align_resource)(struct pci_dev *dev, - const struct resource *res, - resource_size_t start, - resource_size_t size, - resource_size_t align); void *private_data; /* platform controller private data */ }; diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index fcbbbb1..4cdc64d 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -17,6 +17,11 @@ #include static int debug_pci; +static resource_size_t (*align_resource)(struct pci_dev *dev, + const struct resource *res, + resource_size_t start, + resource_size_t size, + resource_size_t align) = NULL; #ifdef CONFIG_PCI_MSI struct msi_controller *pcibios_msi_controller(struct pci_dev *dev) @@ -468,7 +473,7 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, sys->busnr = busnr; sys->swizzle = hw->swizzle; sys->map_irq = hw->map_irq; - sys->align_resource = hw->align_resource; + align_resource = hw->align_resource; INIT_LIST_HEAD(&sys->resources); if (hw->private_data) @@ -589,7 +594,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; - struct pci_sys_data *sys = dev->sysdata; resource_size_t start = res->start; if (res->flags & IORESOURCE_IO && start & 0x300) @@ -597,8 +601,8 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, start = (start + align - 1) & ~(align - 1); - if (sys->align_resource) - return sys->align_resource(dev, res, start, size, align); + if (align_resource) + return align_resource(dev, res, start, size, align); return start; }