From patchwork Thu Oct 15 14:27:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: WingMan Kwok X-Patchwork-Id: 7406851 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 39B16BEEA4 for ; Thu, 15 Oct 2015 14:28:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5B2B220755 for ; Thu, 15 Oct 2015 14:28:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 775612075A for ; Thu, 15 Oct 2015 14:28:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753391AbbJOO2G (ORCPT ); Thu, 15 Oct 2015 10:28:06 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:43152 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751801AbbJOO2B (ORCPT ); Thu, 15 Oct 2015 10:28:01 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t9FEROQ3027883; Thu, 15 Oct 2015 09:27:24 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t9FEROSG024031; Thu, 15 Oct 2015 09:27:24 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Thu, 15 Oct 2015 09:27:24 -0500 Received: from udb0216549.am.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t9FERNSu010067; Thu, 15 Oct 2015 09:27:23 -0500 Received: from a0216549local by udb0216549.am.dhcp.ti.com with local (Exim 4.76) (envelope-from ) id 1ZmjV5-00083X-E2; Thu, 15 Oct 2015 10:27:23 -0400 From: WingMan Kwok To: , , , , , , , , , , , , , , CC: WingMan Kwok Subject: [PATCH] ARM: keystone: dts: add PCI serdes driver bindings Date: Thu, 15 Oct 2015 10:27:10 -0400 Message-ID: <1444919230-30932-1-git-send-email-w-kwok2@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the required PCI serdes bindings whcih can then be enabled by setting the corresponding statuses to "ok" in order to configure and start the PCI serdes. This patch depends on the updates to the Keystone PCIe host driver and common serdes driver patch series that is submitted separately. Signed-off-by: WingMan Kwok --- arch/arm/boot/dts/k2e.dtsi | 21 +++++++++++++++++++++ arch/arm/boot/dts/keystone.dtsi | 21 +++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi index 675fb8e..3b36575 100644 --- a/arch/arm/boot/dts/k2e.dtsi +++ b/arch/arm/boot/dts/k2e.dtsi @@ -86,6 +86,16 @@ gpio,syscon-dev = <&devctrl 0x240>; }; + pcie1_phy: pciephy@2326000 { + #phy-cells = <0>; + compatible = "ti,keystone-serdes-pcie"; + reg = <0x02326000 0x4000>; + reg-names = "serdes"; + link-rate-kbps = <5000000>; + num-lanes = <2>; + status = "disabled"; + }; + pcie1: pcie@21020000 { compatible = "ti,keystone-pcie","snps,dw-pcie"; clocks = <&clkpcie1>; @@ -130,6 +140,17 @@ , ; }; + + /* PCIE phy */ + serdeses { + #address-cells = <1>; + #size-cells = <0>; + serdes@0 { + reg = <0>; + phys = <&pcie1_phy>; + }; + }; + }; mdio: mdio@24200f00 { diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index 72816d6..6566cc4 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -275,6 +275,16 @@ ti,syscon-dev = <&devctrl 0x2a0>; }; + pcie0_phy: pciephy@2320000 { + #phy-cells = <0>; + compatible = "ti,keystone-serdes-pcie"; + reg = <0x02320000 0x4000>; + reg-names = "serdes"; + link-rate-kbps = <5000000>; + num-lanes = <2>; + status = "disabled"; + }; + pcie0: pcie@21800000 { compatible = "ti,keystone-pcie", "snps,dw-pcie"; clocks = <&clkpcie>; @@ -319,6 +329,17 @@ , ; }; + + /* PCIE phy */ + serdeses { + #address-cells = <1>; + #size-cells = <0>; + serdes@0 { + reg = <0>; + phys = <&pcie0_phy>; + }; + }; + }; }; };