From patchwork Thu Dec 3 15:19:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriele Paoloni X-Patchwork-Id: 7760841 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2139F9F30B for ; Thu, 3 Dec 2015 15:06:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 00FC320571 for ; Thu, 3 Dec 2015 15:06:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DF92A20421 for ; Thu, 3 Dec 2015 15:06:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758171AbbLCPGL (ORCPT ); Thu, 3 Dec 2015 10:06:11 -0500 Received: from szxga01-in.huawei.com ([58.251.152.64]:37160 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757972AbbLCPGI (ORCPT ); Thu, 3 Dec 2015 10:06:08 -0500 Received: from 172.24.1.49 (EHLO SZXEML424-HUB.china.huawei.com) ([172.24.1.49]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DAF26470; Thu, 03 Dec 2015 23:05:00 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by SZXEML424-HUB.china.huawei.com (10.82.67.153) with Microsoft SMTP Server id 14.3.235.1; Thu, 3 Dec 2015 23:04:49 +0800 From: Gabriele Paoloni To: , , , , , , , CC: , , , , , , , , , , , , Gabriele Paoloni Subject: [RFC PATCH 1/2] PCI/ACPI: Add ACPI support for non ECAM Host Bridge Controllers Date: Thu, 3 Dec 2015 23:19:58 +0800 Message-ID: <1449155999-220955-2-git-send-email-gabriele.paoloni@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1449155999-220955-1-git-send-email-gabriele.paoloni@huawei.com> References: <1449155999-220955-1-git-send-email-gabriele.paoloni@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.56605A1E.0143, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 5b790361594a5e670e31ee6849ca15c3 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch modifies the ARM64 architecure specific PCI framework to support Host Bridge specific quirks. these quirks are need for host bridge controllers that are not fully ECAM compliant. The quirks array allows each vendor to define his own acpi_scan_handler where its own pci_ops can be defined and the global pointer "vendor_specific_ops" should be set to them accordingly. Signed-off-by: Gabriele Paoloni Signed-off-by: Liudongdong --- arch/arm64/kernel/pci.c | 41 +++++++++++++++++++++++++++++++++++++++++ arch/arm64/kernel/pci_quirks.h | 24 ++++++++++++++++++++++++ drivers/acpi/pci_root.c | 4 ++++ include/acpi/acpi_drivers.h | 6 ++++++ 4 files changed, 75 insertions(+) create mode 100644 arch/arm64/kernel/pci_quirks.h diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index 66cc1ae..d60edb4 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -23,6 +23,7 @@ #include #include +#include "pci_quirks.h" /* * Called after each bus is probed, but before its children are examined @@ -230,6 +231,43 @@ static struct acpi_pci_root_ops acpi_pci_root_ops = { .prepare_resources = pci_acpi_root_prepare_resources, }; +/* + * List of acpi_scan_handlers according to the specific + * Host Bridge controllers that are non ECAM compliant + */ +static struct acpi_scan_handler *quirks_array[] = { + 0 +}; + +void acpi_arm64_quirks(void) +{ + int i = 0; + + while (quirks_array[i]) { + acpi_scan_add_handler(quirks_array[i]); + i++; + } + +} + +/* + * pci_ops specified by vendors that are not + * ECAM compliant + */ +struct pci_ops *vendor_specific_ops; + +/* function to set vendor specific ops */ +void set_quirk_pci_ops(struct pci_ops *quirk_ops) +{ + vendor_specific_ops = quirk_ops; +} + +/* function to unset vendor specific ops */ +void unset_quirk_pci_ops(void) +{ + vendor_specific_ops = NULL; +} + /* Root bridge scanning */ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) { @@ -253,6 +291,9 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) return NULL; } + if (vendor_specific_ops) + acpi_pci_root_ops.pci_ops = vendor_specific_ops; + bus = acpi_pci_root_create(root, &acpi_pci_root_ops, info, root); /* After the PCI-E bus has been walked and all devices discovered, diff --git a/arch/arm64/kernel/pci_quirks.h b/arch/arm64/kernel/pci_quirks.h new file mode 100644 index 0000000..27055ff --- /dev/null +++ b/arch/arm64/kernel/pci_quirks.h @@ -0,0 +1,24 @@ +/* + * PCIe host controller declarations for ACPI quirks + * + * Copyright (C) 2015 HiSilicon Co., Ltd. http://www.hisilicon.com + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef PCI_QUIRKS_H +#define PCI_QUIRKS_H + +/* declarations of vendor specific quirks */ +extern struct acpi_scan_handler pci_root_hisi_handler; + +/* function to set vendor specific ops */ +void set_quirk_pci_ops(struct pci_ops *quirk_ops); + +/* function to unset vendor specific ops */ +void unset_quirk_pci_ops(void); + +#endif /*PCI_QUIRKS_H*/ diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index e682dc6..ff362bb3d 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -863,5 +863,9 @@ void __init acpi_pci_root_init(void) return; pci_acpi_crs_quirks(); + + /* Call quirks for non ECAM ARM64 Host Brdge controllers */ + acpi_arm64_quirks(); + acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root"); } diff --git a/include/acpi/acpi_drivers.h b/include/acpi/acpi_drivers.h index 29c6912..17f4a37 100644 --- a/include/acpi/acpi_drivers.h +++ b/include/acpi/acpi_drivers.h @@ -99,6 +99,12 @@ void pci_acpi_crs_quirks(void); static inline void pci_acpi_crs_quirks(void) { } #endif +#ifdef CONFIG_ARM64 +void acpi_arm64_quirks(void); +#else +static inline void acpi_arm64_quirks(void) { } +#endif + /* -------------------------------------------------------------------------- Processor -------------------------------------------------------------------------- */