From patchwork Thu Jan 7 06:12:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 7973711 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 05B8CBEEE5 for ; Thu, 7 Jan 2016 06:16:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 169B4201BB for ; Thu, 7 Jan 2016 06:16:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2D7B32017E for ; Thu, 7 Jan 2016 06:16:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750754AbcAGGQt (ORCPT ); Thu, 7 Jan 2016 01:16:49 -0500 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:59383 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750745AbcAGGQt (ORCPT ); Thu, 7 Jan 2016 01:16:49 -0500 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id u076Ees5004943; Wed, 6 Jan 2016 22:16:22 -0800 Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0b-0016f401.pphosted.com with ESMTP id 208ynrk2qp-1 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 06 Jan 2016 22:16:22 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1104.5; Wed, 6 Jan 2016 22:16:21 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1104.5 via Frontend Transport; Wed, 6 Jan 2016 22:16:20 -0800 Received: from xhacker.marvell.com (unknown [10.37.135.134]) by maili.marvell.com (Postfix) with ESMTP id C08403F703F; Wed, 6 Jan 2016 22:16:19 -0800 (PST) From: Jisheng Zhang To: , , , CC: , , , Jisheng Zhang Subject: [PATCH] PCI: designware: comment the condition of programming ATU in host init Date: Thu, 7 Jan 2016 14:12:38 +0800 Message-ID: <1452147158-2526-1-git-send-email-jszhang@marvell.com> X-Mailer: git-send-email 2.7.0.rc3 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-01-07_02:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310008 definitions=main-1601070119 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some platforms don't support ATU, e.g pci-keystone.c, these platforms use their own address translation component rather than ATU, and they provide the rd_other_conf and wr_other_conf to programming the translation component then do the required access, so we ignore the ATU programming for these platforms. Add the comment to explain the reason. As Bjorn pointed out, "these definitions: #define PCIE_ATU_TYPE_MEM #define PCIE_ATU_TYPE_IO #define PCIE_ATU_TYPE_CFG0 #define PCIE_ATU_TYPE_CFG1 and these uses: - In dw_pcie_host_init(), set PCIE_ATU_TYPE_MEM for unit 1 (but only if rd_other_conf is not overridden) - In dw_pcie_rd_other_conf() and dw_pcie_wr_other_conf(), set PCIE_ATU_TYPE_CFG0 before config access to own bus; set PCIE_ATU_TYPE_CFG1 before config access to other bus; set PCIE_ATU_TYPE_IO after completion Why is that initialization related to rd_other_conf? Shouldn't that be set up always? A comment here would be nice..." To be honest, I can't answer this question immediately until I read the code carefully again. So indeed, the comment is really necessary. Signed-off-by: Jisheng Zhang --- drivers/pci/host/pcie-designware.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 02a7452..b795b20 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -517,6 +517,12 @@ int dw_pcie_host_init(struct pcie_port *pp) if (pp->ops->host_init) pp->ops->host_init(pp); + /* + * If the platform provides ->rd_other_conf, it means the platform + * doesn't support ATU, it uses its own address translation component + * rather than ATU, so we should ignore ATU programming for this + * kind of platform. + */ if (!pp->ops->rd_other_conf) dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX1, PCIE_ATU_TYPE_MEM, pp->mem_base,