From patchwork Wed Jun 8 00:07:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 9162893 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CB92D60467 for ; Wed, 8 Jun 2016 00:08:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BBDD42836C for ; Wed, 8 Jun 2016 00:08:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B0A2828378; Wed, 8 Jun 2016 00:08:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F2C322836C for ; Wed, 8 Jun 2016 00:08:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751791AbcFHAIM (ORCPT ); Tue, 7 Jun 2016 20:08:12 -0400 Received: from mail-yw0-f196.google.com ([209.85.161.196]:36642 "EHLO mail-yw0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751475AbcFHAIL (ORCPT ); Tue, 7 Jun 2016 20:08:11 -0400 Received: by mail-yw0-f196.google.com with SMTP id l126so24887974ywe.3 for ; Tue, 07 Jun 2016 17:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=2zRxmcfPXXjDABjK37bMWF/NuFOwX4o33YEj2AcPFbU=; b=GEfEc6uw5rPwl3xzqz83YVRP2+pRt+QIyY29DYkjub1EBGMGGgHGQ5H4XNPNxSMLU5 NXlV38IZWUYMGbG0NQctcORo5AGX4Lf0N2sXzedr7Y5CE33iUupWNn6TYxG8K8Z6zI7u uO1t7zdHc1EdUEICp25jx5/BvGgDU3kL3ubOcyhz4cJ0765Gy9cNsTFlmiNbV46q2koe lwdhTIA5RMu8qYfGwKGnRJooWeW2KOvcO9G71MiJP+pSvbAAzO30JKkUuUhVCElCDD+P xZbbx8dmqun1ri26Zi7Kskarzc5qvbbp3+3URISnmSUpY6uwZOdrCg7V17vRP441JFdT RKgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=2zRxmcfPXXjDABjK37bMWF/NuFOwX4o33YEj2AcPFbU=; b=F5Q4gy5oNJJzdUBWkyNGsP0DOmaOAyA/jFYT+6kpdVXZtaREk0fJwiyhHzLhYUXxKT un0Dl7UXuW+em9U3HWpJCI+BhFmUsEcuJ/4OgWtJ2saQp3r1CRRpD6RgpJUDS0+UC33S hPoCLBWGoAGdvbIbBEbkuzCub62J2uEP9LgWQUvgg8qdv+jrHBIB2BaOKHMZiVzCkMnC rFGTDi9+J6CYS9SzyTeL0sIxbWdYmWtZQDdggD4fYmtxjXsAb4oaRYYPGytDhEtrkEU3 hFjO94Uy1fyNOfJaWzCxfXUTZ0+KAUg17PcbeLSbFAleyDAEJQMbfiQSQhRVohuoXFu7 06pw== X-Gm-Message-State: ALyK8tKNWZx1HBQ4O2IXRWyBFvqMhs51Ih62AKyO3M2Jr9DfuavbGYEXg5ZbGTp6XmbWTA== X-Received: by 10.129.158.144 with SMTP id v138mr1403408ywg.9.1465344489996; Tue, 07 Jun 2016 17:08:09 -0700 (PDT) Received: from localhost.localdomain ([201.82.170.184]) by smtp.gmail.com with ESMTPSA id i68sm15840045ywe.44.2016.06.07.17.08.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Jun 2016 17:08:09 -0700 (PDT) From: Fabio Estevam To: bhelgaas@google.com Cc: l.stach@pengutronix.de, hongxing.zhu@nxp.com, chf.fritz@googlemail.com, shawnguo@kernel.org, linux-pci@vger.kernel.org, Fabio Estevam Subject: [PATCH] PCI: imx6: Add support for MX6SX LDO PCIE domain regulator Date: Tue, 7 Jun 2016 21:07:52 -0300 Message-Id: <1465344472-15703-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fabio Estevam MX6SX has an internal LDO regulator for the PCIE domain, which needs to be turned on for PCIE functionality. Add support for it. Signed-off-by: Fabio Estevam --- .../devicetree/bindings/pci/fsl,imx6q-pcie.txt | 2 ++ drivers/pci/host/pci-imx6.c | 29 +++++++++++++++++++++- 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index f3d26f47..cfb0e86 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -33,6 +33,8 @@ Optional properties: Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entry: - "pcie_inbound_axi" +- pcie-phy-supply: Must point to the internal PCIE power domain regulator: + <®_pcie>; Example: diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index b741a36..ad9cc8b 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "pcie-designware.h" @@ -55,6 +56,7 @@ struct imx6_pcie { u32 tx_swing_full; u32 tx_swing_low; int link_gen; + struct regulator *phy_regulator; }; /* PCIe Root Complex registers (memory-mapped) */ @@ -96,6 +98,8 @@ struct imx6_pcie { #define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5) #define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3) +#define MX6SX_PCIE_LDO 1100000 + static int pcie_phy_poll_ack(void __iomem *dbi_base, int exp_val) { u32 val; @@ -407,11 +411,26 @@ err_pcie_phy: static void imx6_pcie_init_phy(struct pcie_port *pp) { struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); + int ret; + + if (imx6_pcie->variant == IMX6SX) { + ret = regulator_set_voltage(imx6_pcie->phy_regulator, + MX6SX_PCIE_LDO, MX6SX_PCIE_LDO); + if (ret) { + dev_err(pp->dev, "failed to set pcie phy voltage.\n"); + return ret; + } + + ret = regulator_enable(imx6_pcie->phy_regulator); + if (ret) { + dev_err(pp->dev, "failed to enable pcie regulator.\n"); + return; + } - if (imx6_pcie->variant == IMX6SX) regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_RX_EQ_MASK, IMX6SX_GPR12_PCIE_RX_EQ_2); + } regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6Q_GPR12_PCIE_CTL_2, 0 << 10); @@ -680,6 +699,14 @@ static int __init imx6_pcie_probe(struct platform_device *pdev) "pcie_incbound_axi clock missing or invalid\n"); return PTR_ERR(imx6_pcie->pcie_inbound_axi); } + + imx6_pcie->phy_regulator = devm_regulator_get(pp->dev, + "pcie-phy"); + if (IS_ERR(imx6_pcie->phy_regulator)) { + dev_err(&pdev->dev, + "failed to get pcie-phy regulator\n"); + return PTR_ERR(imx6_pcie->phy_regulator); + } } /* Grab GPR config register range */