From patchwork Wed Jun 15 15:34:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Covington X-Patchwork-Id: 9178787 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B731360776 for ; Wed, 15 Jun 2016 15:34:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A410F208C2 for ; Wed, 15 Jun 2016 15:34:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 968C327DA4; Wed, 15 Jun 2016 15:34:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA348208C2 for ; Wed, 15 Jun 2016 15:34:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932698AbcFOPer (ORCPT ); Wed, 15 Jun 2016 11:34:47 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:58724 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932432AbcFOPeq (ORCPT ); Wed, 15 Jun 2016 11:34:46 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 56C086144A; Wed, 15 Jun 2016 15:34:45 +0000 (UTC) Received: from illium.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: cov@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B1093613A2; Wed, 15 Jun 2016 15:34:41 +0000 (UTC) From: Christopher Covington To: Tomasz Nowicki , Duc Dang , Dongdong Liu Cc: Sinan Kaya , Jeff Hugo , Gabriele Paoloni , Jon Masters , Mark Salter , Suravee Suthikulpanit , Jayachandran C , David Daney , Robert Richter , Lorenzo Pieralisi , Hanjun Guo , linux-arm-kernel@lists.infradead.org, Christopher Covington , "Rafael J. Wysocki" , Len Brown , Arnd Bergmann , Bjorn Helgaas , linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-pci@vger.kernel.org Subject: [RFC PATCH v3 1/2] ACPI/PCI: Check platform specific ECAM quirks Date: Wed, 15 Jun 2016 11:34:10 -0400 Message-Id: <1466004851-10214-1-git-send-email-cov@codeaurora.org> X-Mailer: git-send-email 2.8.1 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Nowicki Some platforms may not be fully compliant with the generic PCI config operations. For these cases we implement a way to use custom map and accessor functions. The algorithm traverses the available quirk list, matches against tuples and returns corresponding PCI config ops. oem_id, oem_table_id, and oem_revision come from the MCFG table standard header. All quirks can be defined using the DECLARE_ACPI_MCFG_FIXUP() macro and are kept self contained. Example: /* Custom PCI config ops */ static struct pci_generic_ecam_ops foo_pci_ops = { .bus_shift = 24, .pci_ops = { .map_bus = pci_ecam_map_bus, .read = foo_ecam_config_read, .write = foo_ecam_config_write, } }; DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, "OEM", "TABLE-ID", , , ); Signed-off-by: Tomasz Nowicki Signed-off-by: Dongdong Liu Signed-off-by: Christopher Covington --- Changes from v2 to v3: * Match against all three of oem_id, oem_table_id, and oem_revision. * Perform substring match, so padding oem_id and oem_table_id isn't required. (Using min_t() thanks to Duc Dang's suggestion.) * Print when quirk matched. * Use __UNIQUE_ID() macro to generate a valid, unique symbol name even when OEM and table IDs contain characters such as dash "-". * Move extern declaration to header and fix spelling and formatting to satisfy checkpatch/coding style. --- drivers/acpi/pci_mcfg.c | 49 ++++++++++++++++++++++++++++++++++++--- include/asm-generic/vmlinux.lds.h | 7 ++++++ include/linux/pci-acpi.h | 24 +++++++++++++++++++ 3 files changed, 77 insertions(+), 3 deletions(-) diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c index b5b376e..2a5d3dd 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -22,6 +22,10 @@ #include #include #include +#include + +/* Root pointer to the mapped MCFG table */ +static struct acpi_table_mcfg *mcfg_table; /* Structure to hold entries from the MCFG table */ struct mcfg_entry { @@ -35,6 +39,46 @@ struct mcfg_entry { /* List to save MCFG entries */ static LIST_HEAD(pci_mcfg_list); +static bool pci_mcfg_fixup_match(struct pci_cfg_fixup *f, + struct acpi_table_header *h) +{ + int olen = min_t(u8, strlen(f->oem_id), ACPI_OEM_ID_SIZE); + int tlen = min_t(u8, strlen(f->oem_table_id), ACPI_OEM_TABLE_ID_SIZE); + + return (!strncmp(f->oem_id, h->oem_id, olen) && + !strncmp(f->oem_table_id, h->oem_table_id, tlen) && + f->oem_revision == h->oem_revision); +} + +struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root) +{ + int bus_num = root->secondary.start; + int domain = root->segment; + struct pci_cfg_fixup *f; + + if (!mcfg_table) + return &pci_generic_ecam_ops; + + /* + * Match against platform specific quirks and return corresponding CAM + * ops. + * + * First match against PCI topology then use OEM ID, OEM + * table ID, and OEM revision from MCFG table standard header. + */ + for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) { + if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) && + (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) && + pci_mcfg_fixup_match(f, &mcfg_table->header)) { + pr_info("Handling %s %s r%d PCI MCFG quirks\n", + f->oem_id, f->oem_table_id, f->oem_revision); + return f->ops; + } + } + /* No quirks, use ECAM */ + return &pci_generic_ecam_ops; +} + phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res) { struct mcfg_entry *e; @@ -54,7 +98,6 @@ phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res) static __init int pci_mcfg_parse(struct acpi_table_header *header) { - struct acpi_table_mcfg *mcfg; struct acpi_mcfg_allocation *mptr; struct mcfg_entry *e, *arr; int i, n; @@ -64,8 +107,8 @@ static __init int pci_mcfg_parse(struct acpi_table_header *header) n = (header->length - sizeof(struct acpi_table_mcfg)) / sizeof(struct acpi_mcfg_allocation); - mcfg = (struct acpi_table_mcfg *)header; - mptr = (struct acpi_mcfg_allocation *) &mcfg[1]; + mcfg_table = (struct acpi_table_mcfg *)header; + mptr = (struct acpi_mcfg_allocation *) &mcfg_table[1]; arr = kcalloc(n, sizeof(*arr), GFP_KERNEL); if (!arr) diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 6a67ab9..43604fc 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -300,6 +300,13 @@ VMLINUX_SYMBOL(__end_pci_fixups_suspend_late) = .; \ } \ \ + /* ACPI MCFG quirks */ \ + .acpi_fixup : AT(ADDR(.acpi_fixup) - LOAD_OFFSET) { \ + VMLINUX_SYMBOL(__start_acpi_mcfg_fixups) = .; \ + *(.acpi_fixup_mcfg) \ + VMLINUX_SYMBOL(__end_acpi_mcfg_fixups) = .; \ + } \ + \ /* Built-in firmware blobs */ \ .builtin_fw : AT(ADDR(.builtin_fw) - LOAD_OFFSET) { \ VMLINUX_SYMBOL(__start_builtin_fw) = .; \ diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 7d63a66..dac851b 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -25,6 +25,7 @@ static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev) extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle); extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res); +extern struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root); static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev) { @@ -72,6 +73,29 @@ struct acpi_pci_root_ops { int (*prepare_resources)(struct acpi_pci_root_info *info); }; +struct pci_cfg_fixup { + struct pci_ecam_ops *ops; + char *oem_id; + char *oem_table_id; + u32 oem_revision; + int domain; + int bus_num; +}; + +extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[]; +extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[]; + +#define PCI_MCFG_DOMAIN_ANY -1 +#define PCI_MCFG_BUS_ANY -1 + +/* Designate a routine to fix up buggy MCFG */ +#define DECLARE_ACPI_MCFG_FIXUP(ops, oem, table, rev, dom, bus) \ + static const struct pci_cfg_fixup \ + __UNIQUE_ID(mcfg_fixup_) \ + __used __attribute__((__section__(".acpi_fixup_mcfg"), \ + aligned((sizeof(void *))))) = \ + { ops, oem, table, rev, dom, bus } + extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info); extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, struct acpi_pci_root_ops *ops,