From patchwork Wed Sep 14 12:15:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhichang Yuan X-Patchwork-Id: 9331279 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8814B60231 for ; Wed, 14 Sep 2016 12:00:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 76D4F295E5 for ; Wed, 14 Sep 2016 12:00:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 684D829D18; Wed, 14 Sep 2016 12:00:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E1C0E295E5 for ; Wed, 14 Sep 2016 12:00:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932846AbcINL7y (ORCPT ); Wed, 14 Sep 2016 07:59:54 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:3850 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932843AbcINL7v (ORCPT ); Wed, 14 Sep 2016 07:59:51 -0400 Received: from 172.24.1.136 (EHLO szxeml425-hub.china.huawei.com) ([172.24.1.136]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DRA50197; Wed, 14 Sep 2016 19:58:01 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by szxeml425-hub.china.huawei.com (10.82.67.180) with Microsoft SMTP Server id 14.3.235.1; Wed, 14 Sep 2016 19:57:53 +0800 From: Zhichang Yuan To: , , CC: , , , , , , , , , , , , , , , , "zhichang.yuan" Subject: [PATCH V3 1/4] ARM64 LPC: Indirect ISA port IO introduced Date: Wed, 14 Sep 2016 20:15:51 +0800 Message-ID: <1473855354-150093-2-git-send-email-yuanzhichang@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com> References: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.57D93B4A.011D, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 97aab85344f7c978c99ea8e32637c036 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: "zhichang.yuan" For arm64, there is no I/O space as other architectural platforms, such as X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs, such as Hip06, when accessing some legacy ISA devices connected to LPC, those known port addresses are used to control the corresponding target devices, for example, 0x2f8 is for UART, 0xe4 is for ipmi-bt. It is different from the normal MMIO mode in using. To drive these devices, this patch introduces a method named indirect-IO. In this method the in/out pair in arch/arm64/include/asm/io.h will be redefined. When upper layer drivers call in/out with those known legacy port addresses to access the peripherals, the hooking functions corrresponding to those target peripherals will be called. Through this way, those upper layer drivers which depend on in/out can run on Hip06 without any changes. Signed-off-by: zhichang.yuan --- arch/arm64/Kconfig | 6 +++ arch/arm64/include/asm/io.h | 90 +++++++++++++++++++++++++++++++++++++++++++++ drivers/bus/extio.c | 66 +++++++++++++++++++++++++++++++++ include/linux/extio.h | 49 ++++++++++++++++++++++++ 4 files changed, 211 insertions(+) create mode 100644 drivers/bus/extio.c create mode 100644 include/linux/extio.h diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index bc3f00f..9579479 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -161,6 +161,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MIN config ARCH_MMAP_RND_COMPAT_BITS_MAX default 16 +config ARM64_INDIRECT_PIO + def_bool n + help + Support to access the ISA I/O devices with the legacy X86 I/O port + addresses in some SoCs, such as Hisilicon Hip06. + config NO_IOPORT_MAP def_bool y if !PCI diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 9b6e408..d3acf1f 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -34,6 +34,10 @@ #include +#ifdef CONFIG_ARM64_INDIRECT_PIO +#include +#endif + /* * Generic IO read/write. These perform native-endian accesses. */ @@ -142,6 +146,38 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); }) + +#define BUILDS_RW(bwl, type) \ +static inline void reads##bwl(const volatile void __iomem *addr, \ + void *buffer, unsigned int count) \ +{ \ + if (count) { \ + type *buf = buffer; \ + \ + do { \ + type x = __raw_read##bwl(addr); \ + *buf++ = x; \ + } while (--count); \ + } \ +} \ + \ +static inline void writes##bwl(volatile void __iomem *addr, \ + const void *buffer, unsigned int count) \ +{ \ + if (count) { \ + const type *buf = buffer; \ + \ + do { \ + __raw_write##bwl(*buf++, addr); \ + } while (--count); \ + } \ +} + +BUILDS_RW(b, u8) +#define readsb readsb +#define writesb writesb + + /* * I/O port access primitives. */ @@ -149,6 +185,60 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #define IO_SPACE_LIMIT (PCI_IO_SIZE - 1) #define PCI_IOBASE ((void __iomem *)PCI_IO_START) + +/* + * redefine the in(s)b/out(s)b for indirect-IO. + */ +#define inb inb +static inline u8 inb(unsigned long addr) +{ +#ifdef CONFIG_ARM64_INDIRECT_PIO + if (arm64_extio_ops && arm64_extio_ops->start <= addr && + addr <= arm64_extio_ops->end) + return extio_inb(addr); +#endif + return readb(PCI_IOBASE + addr); +} + + +#define outb outb +static inline void outb(u8 value, unsigned long addr) +{ +#ifdef CONFIG_ARM64_INDIRECT_PIO + if (arm64_extio_ops && arm64_extio_ops->start <= addr && + addr <= arm64_extio_ops->end) + extio_outb(value, addr); + else +#endif + writeb(value, PCI_IOBASE + addr); +} + +#define insb insb +static inline void insb(unsigned long addr, void *buffer, unsigned int count) +{ +#ifdef CONFIG_ARM64_INDIRECT_PIO + if (arm64_extio_ops && arm64_extio_ops->start <= addr && + addr <= arm64_extio_ops->end) + extio_insb(addr, buffer, count); + else +#endif + readsb(PCI_IOBASE + addr, buffer, count); +} + +#define outsb outsb +static inline void outsb(unsigned long addr, const void *buffer, + unsigned int count) +{ +#ifdef CONFIG_ARM64_INDIRECT_PIO + if (arm64_extio_ops && arm64_extio_ops->start <= addr && + addr <= arm64_extio_ops->end) + extio_outsb(addr, buffer, count); + else +#endif + writesb(PCI_IOBASE + addr, buffer, count); +} + + /* * String version of I/O memory access operations. */ diff --git a/drivers/bus/extio.c b/drivers/bus/extio.c new file mode 100644 index 0000000..1e7a9c5 --- /dev/null +++ b/drivers/bus/extio.c @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2016 Hisilicon Limited, All Rights Reserved. + * Author: Zhichang Yuan + * Author: Zou Rongrong <@huawei.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + + +struct extio_ops *arm64_extio_ops; + + +u8 __weak extio_inb(unsigned long addr) +{ + return arm64_extio_ops->pfin ? + arm64_extio_ops->pfin(arm64_extio_ops->devpara, + addr + arm64_extio_ops->ptoffset, NULL, + sizeof(u8), 1) : -1; +} + +void __weak extio_outb(u8 value, unsigned long addr) +{ + if (!arm64_extio_ops->pfout) + return; + + arm64_extio_ops->pfout(arm64_extio_ops->devpara, + addr + arm64_extio_ops->ptoffset, &value, + sizeof(u8), 1); +} + + +void __weak extio_insb(unsigned long addr, void *buffer, + unsigned int count) +{ + if (!arm64_extio_ops->pfin) + return; + + arm64_extio_ops->pfin(arm64_extio_ops->devpara, + addr + arm64_extio_ops->ptoffset, buffer, + sizeof(u8), count); +} + +void __weak extio_outsb(unsigned long addr, const void *buffer, + unsigned int count) +{ + if (!arm64_extio_ops->pfout) + return; + + arm64_extio_ops->pfout(arm64_extio_ops->devpara, + addr + arm64_extio_ops->ptoffset, buffer, + sizeof(u8), count); +} + + diff --git a/include/linux/extio.h b/include/linux/extio.h new file mode 100644 index 0000000..08d1fca --- /dev/null +++ b/include/linux/extio.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2016 Hisilicon Limited, All Rights Reserved. + * Author: Zhichang Yuan + * Author: Zou Rongrong <@huawei.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __LINUX_EXTIO_H +#define __LINUX_EXTIO_H + + +typedef u64 (*inhook)(void *devobj, unsigned long ptaddr, void *inbuf, + size_t dlen, unsigned int count); +typedef void (*outhook)(void *devobj, unsigned long ptaddr, + const void *outbuf, size_t dlen, + unsigned int count); + +struct extio_ops { + unsigned long start;/* inclusive, sys io addr */ + unsigned long end;/* inclusive, sys io addr */ + unsigned long ptoffset;/* port Io - system Io */ + + inhook pfin; + outhook pfout; + void *devpara; +}; + + +extern struct extio_ops *arm64_extio_ops; + +extern u8 extio_inb(unsigned long addr); +extern void extio_outb(u8 value, unsigned long addr); +extern void extio_insb(unsigned long addr, void *buffer, unsigned int count); +extern void extio_outsb(unsigned long addr, const void *buffer, + unsigned int count); + + +#endif /* __LINUX_EXTIO_H*/