From patchwork Fri Jan 20 14:16:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sinan Kaya X-Patchwork-Id: 9528575 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 99BB460434 for ; Fri, 20 Jan 2017 14:17:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A69328520 for ; Fri, 20 Jan 2017 14:17:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7F17628527; Fri, 20 Jan 2017 14:17:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 08A1A28520 for ; Fri, 20 Jan 2017 14:17:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752124AbdATORd (ORCPT ); Fri, 20 Jan 2017 09:17:33 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:54578 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751982AbdATORb (ORCPT ); Fri, 20 Jan 2017 09:17:31 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 36F05608CF; Fri, 20 Jan 2017 14:17:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1484921820; bh=1g4hTzPxm4M6DmcKMfc+8mc6sEPFvXusLlQSi61bqJU=; h=From:To:Cc:Subject:Date:From; b=GrCpb/uIcTTKuglgJIWjZvmDbY2axGQ7De9GZs+bTznf6GL+98swQzwNjxpshHD4X PwraxFcViZP5bMvkiQ0EjJZRDbwS2157b7h2BmgIWc0CtYhZ0oDz63YtDbbvy6Tpsi Q9GUKAZLCGFG9nLSlgHKhTbn9fW7eW5wDAt91LXc= Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3317660879; Fri, 20 Jan 2017 14:16:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1484921819; bh=1g4hTzPxm4M6DmcKMfc+8mc6sEPFvXusLlQSi61bqJU=; h=From:To:Cc:Subject:Date:From; b=Kh6PM3T7m9hx+ko/zRlDB9z8FpX6x2EVAIMSCyc6OVQgdOvdtLL+AJBgj5/vYoQge hlyXBjinFrRg+ThWH7muNysraNGc0k0fc+K6sj3QmoPLS2htRS3adKHPsuWhzsXRkN 4+xP/F2urs0s3o9SYhNwi+KDJsnHJK+Tm1yVA2xo= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3317660879 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: okaya@codeaurora.org Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2] PCI: enable extended tags support for PCIe devices Date: Fri, 20 Jan 2017 09:16:51 -0500 Message-Id: <1484921814-8511-1-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Each PCIe device can issue up to 32 transactions at a time by default. This limitation is historically coming from PCI. Each transaction is tracked by a tag number on the bus. 2.2.6.2. Transaction Descriptor – Transaction ID Field section of the PCIe 3.1 specification describes extended tags. PCI supports 32 outstanding non-posted requests at a given time. This number has been extended to 256 on PCI Express. According to the specification, all PCIe devices are required to support receiving 8-bit Tags (Tag completer). The PCIe-PCI bridges handle the translation of 8-bit tags to 5-bit tags. However, the generation of 8-bit tags is left optional to a particular HW implementation. The code needs to check HW support before attempting to enable extended tags producer capability. 32 outstanding transactions is not enough for some performance critical applications especially when a lot of small sized frames are transmitted. Extended tags support increases this number to 256. Devices not supporting extended tags tie-off this field to 0. According to ECN, it is safe to enable this feature for all PCIe devices. Signed-off-by: Sinan Kaya --- drivers/pci/probe.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index e164b5c..1192475 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1650,12 +1650,28 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp) */ } +static void pci_configure_extended_tags(struct pci_dev *pdev) +{ + u32 dev_cap; + int ret; + + ret = pcie_capability_read_dword(pdev, PCI_EXP_DEVCAP, &dev_cap); + + if (ret) + return; + + if (dev_cap & PCI_EXP_DEVCAP_EXT_TAG) + pcie_capability_set_word(pdev, PCI_EXP_DEVCTL, + PCI_EXP_DEVCTL_EXT_TAG); +} + static void pci_configure_device(struct pci_dev *dev) { struct hotplug_params hpp; int ret; pci_configure_mps(dev); + pci_configure_extended_tags(dev); memset(&hpp, 0, sizeof(hpp)); ret = pci_get_hp_params(dev, &hpp);