From patchwork Mon Apr 10 11:58:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yongji Xie X-Patchwork-Id: 9672479 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BD6FB60244 for ; Mon, 10 Apr 2017 12:02:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B2EB927CAF for ; Mon, 10 Apr 2017 12:02:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A50E928449; Mon, 10 Apr 2017 12:02:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 31F2D27CAF for ; Mon, 10 Apr 2017 12:02:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753194AbdDJMCl (ORCPT ); Mon, 10 Apr 2017 08:02:41 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:35741 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753165AbdDJMCk (ORCPT ); Mon, 10 Apr 2017 08:02:40 -0400 Received: by mail-pf0-f196.google.com with SMTP id a188so669426pfa.2 for ; Mon, 10 Apr 2017 05:02:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dXXTzs6A/XkbFyx4Bjsssw2gS1VJ8l/+B0sSvvs00lE=; b=gLDPsIIDG4O8yNuekf/FWTVlMtFl48vXpMLhWOjtNrg6pgRoyGkf5z+0UDJIZ4NKA3 edSGp3Opl5uwIDCLT7dXrBq16dGBsDQsA79Xu5BcokNaZBUIRRAdJwcBSZXvqNVHfP28 /NKzcU+WNWz4q0/rdAWSOU40TiZR61gsSWVnqSNUHrApxxBp1C+V6PchCBHzcSGpt2lL O/ersHQYzLRr7GwO/y6ZvISLjJNOjqW0MCjyhf3DIeFezpkxHEkB6A6Vqcnk4YjXQ7pY +/7sFjW2Eur1fRvl890nihMIC1HWm/f86ZuFsp4WcxEJrQahuwxFp3z1nxV8nJWztkZg /m6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dXXTzs6A/XkbFyx4Bjsssw2gS1VJ8l/+B0sSvvs00lE=; b=OaJFeFOUYgYKYBfeAllQnLm9ZDvrPv7M5p/w3qOjn8OsJ2qFtKIp5mQ1ekwfyQQkiQ vEI/OoR8hEn81PXoxIiZBMDIYcRL2odRFP9x8Keu6pbvg8A7WV06lCW6yvexMlz+AbhR m0S6WvxZUTJt09Uw2965QREisEG3qNStunGKXDWzTSDydt124dzSsYrfxp87fn2Irjam 2//hYFdBkYCiI4l3jKWv+XpyvYRpv3Z6+BBFUTE51bxl1lXARFoSyjURH8f+brWEaR0c jc59KEZjhSq0vqyRtAW8/I1HW2q2xSyECFyAuD9TMunQbAqDGPNdCEVi3D6wK0T6IzH2 oewA== X-Gm-Message-State: AFeK/H2i6pqgU+87de+aSydHF3a2iEQiGxm2PGE3w4wSQj365W9VR32Hmf9J+zI7qG0Wtw== X-Received: by 10.84.211.97 with SMTP id b88mr68817708pli.113.1491825759562; Mon, 10 Apr 2017 05:02:39 -0700 (PDT) Received: from localhost ([116.247.112.152]) by smtp.gmail.com with ESMTPSA id 74sm24433098pfn.102.2017.04.10.05.02.38 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 10 Apr 2017 05:02:39 -0700 (PDT) From: Yongji Xie To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, alex.williamson@redhat.com, gwshan@linux.vnet.ibm.com, aik@ozlabs.ru, benh@kernel.crashing.org, mpe@ellerman.id.au, paulus@samba.org, zhong@linux.vnet.ibm.com Subject: [PATCH v10 4/4] PCI: Don't extend device's size when using default alignment for all devices Date: Mon, 10 Apr 2017 19:58:14 +0800 Message-Id: <1491825494-19331-5-git-send-email-elohimes@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1491825494-19331-1-git-send-email-elohimes@gmail.com> References: <1491825494-19331-1-git-send-email-elohimes@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently we reassign the alignment by extending resources' size in pci_reassigndev_resource_alignment(). This could potentially break some drivers when the driver uses the size to locate register whose length is related to the size. Some examples as below: - misc/Hpilo.c: off = pci_resource_len(pdev, bar) - 0x2000; - net/ethernet/chelsio/cxgb4/cxgb4_uld.h: (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size)) - infiniband/hw/nes/Nes_hw.c: num_pds = pci_resource_len(nesdev->pcidev, BAR_1) >> PAGE_SHIFT; This risk could be easily prevented before because we only had one way (kernel parameter resource_alignment) to touch those codes. And even some users may be happy to see the extended size. But now we introduce pcibios_default_alignment() to set default alignment for all PCI devices which would also touch those codes. It would be hard to prevent the risk in this case. So this patch tries to use START_ALIGNMENT to identify the resource's alignment without extending the size when the alignment reassigning is caused by the default alignment. Signed-off-by: Yongji Xie --- drivers/pci/pci.c | 34 ++++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 02f1255..358366e 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4959,11 +4959,13 @@ resource_size_t __weak pcibios_default_alignment(struct pci_dev *dev) /** * pci_specified_resource_alignment - get resource alignment specified by user. * @dev: the PCI device to get + * @resize: whether or not to change resources' size when reassigning alignment * * RETURNS: Resource alignment if it is specified. * Zero if it is not specified. */ -static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev) +static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev, + bool *resize) { int seg, bus, slot, func, align_order, count; unsigned short vendor, device, subsystem_vendor, subsystem_device; @@ -5005,6 +5007,7 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev) (!device || (device == dev->device)) && (!subsystem_vendor || (subsystem_vendor == dev->subsystem_vendor)) && (!subsystem_device || (subsystem_device == dev->subsystem_device))) { + *resize = true; if (align_order == -1) align = PAGE_SIZE; else @@ -5030,6 +5033,7 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev) bus == dev->bus->number && slot == PCI_SLOT(dev->devfn) && func == PCI_FUNC(dev->devfn)) { + *resize = true; if (align_order == -1) align = PAGE_SIZE; else @@ -5062,6 +5066,7 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) struct resource *r; resource_size_t align, size; u16 command; + bool resize = false; /* * VF BARs are read-only zero according to SR-IOV spec r1.1, sec @@ -5073,7 +5078,7 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) return; /* check if specified PCI is target device to reassign */ - align = pci_specified_resource_alignment(dev); + align = pci_specified_resource_alignment(dev, &resize); if (!align) return; @@ -5101,15 +5106,24 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) } size = resource_size(r); - if (size < align) { - size = align; - dev_info(&dev->dev, - "Rounding up size of resource #%d to %#llx.\n", - i, (unsigned long long)size); + if (resize) { + if (size < align) { + size = align; + dev_info(&dev->dev, + "Rounding up size of resource #%d to %#llx.\n", + i, (unsigned long long)size); + } + r->flags |= IORESOURCE_UNSET; + r->start = 0; + } else { + if (size < align) { + r->flags &= ~IORESOURCE_SIZEALIGN; + r->flags |= IORESOURCE_STARTALIGN | + IORESOURCE_UNSET; + r->start = align; + } } - r->flags |= IORESOURCE_UNSET; - r->end = size - 1; - r->start = 0; + r->end = r->start + size - 1; } /* Need to disable bridge's resource window, * to enable the kernel to reassign new resource