From patchwork Thu Aug 3 08:23:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 9878461 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7549460360 for ; Thu, 3 Aug 2017 08:40:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5839328876 for ; Thu, 3 Aug 2017 08:40:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4CE6228889; Thu, 3 Aug 2017 08:40:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6E302888B for ; Thu, 3 Aug 2017 08:40:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751244AbdHCIk1 (ORCPT ); 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dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1AFFO11FD047.mail.protection.outlook.com (10.58.53.62) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1282.16 via Frontend Transport; Thu, 3 Aug 2017 08:40:22 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v738eCtD031161; Thu, 3 Aug 2017 01:40:19 -0700 From: Zhiqiang Hou To: , , , CC: , , , Hou Zhiqiang Subject: [PATCHv2 2/6] PCI: designware: enable write permission before updating class code Date: Thu, 3 Aug 2017 16:23:36 +0800 Message-ID: <1501748620-42866-3-git-send-email-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1501748620-42866-1-git-send-email-Zhiqiang.Hou@nxp.com> References: <1501748620-42866-1-git-send-email-Zhiqiang.Hou@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131462232232707519; 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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR0301MB0897 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang The existing fix doesn't actually work because the Class register is read-only, so it must enable the write permission before write the correct value to this register. Signed-off-by: Hou Zhiqiang Acked-By: Joao Pinto --- V2: - None drivers/pci/dwc/pcie-designware-host.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c index d29c020..6e10cda 100644 --- a/drivers/pci/dwc/pcie-designware-host.c +++ b/drivers/pci/dwc/pcie-designware-host.c @@ -634,8 +634,12 @@ void dw_pcie_setup_rc(struct pcie_port *pp) dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0); + /* Enable write permission for the DBI read-only register */ + dw_pcie_dbi_ro_wr_en(pci); /* program correct class for RC */ dw_pcie_wr_own_conf(pp, PCI_CLASS_DEVICE, 2, PCI_CLASS_BRIDGE_PCI); + /* Better disable write permission right after the update */ + dw_pcie_dbi_ro_wr_dis(pci); dw_pcie_rd_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, &val); val |= PORT_LOGIC_SPEED_CHANGE;