From patchwork Mon Nov 27 06:20:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinan Kaya X-Patchwork-Id: 10075807 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3E8E1602BD for ; Mon, 27 Nov 2017 06:21:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3029D28D43 for ; Mon, 27 Nov 2017 06:21:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 24F5528D4B; Mon, 27 Nov 2017 06:21:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BA05E28D4C for ; Mon, 27 Nov 2017 06:21:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751430AbdK0GUv (ORCPT ); Mon, 27 Nov 2017 01:20:51 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:49090 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751197AbdK0GUs (ORCPT ); Mon, 27 Nov 2017 01:20:48 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A5F7D69B49; Mon, 27 Nov 2017 06:20:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511763647; bh=qxdJQn9AI4tqf4BU5ND+/39ZheJDC1qL7ai5e/lGkvc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fXb1yVEke9GOTmcpc/cKv7x63QBgRgpzdlSSz9j93FjRnGHbfdjelMNe3xxM/ogk6 zi2DnTivCCYporM6yEU5/3LLo1pR96tCzMONXxDjqLwq+JV2bW80s0KONfiqH7iymv If+S7heXAUOZDV4Tx09xS5YL1DxbVJuA120/viJY= Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5138969B3A; Mon, 27 Nov 2017 06:20:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511763645; bh=qxdJQn9AI4tqf4BU5ND+/39ZheJDC1qL7ai5e/lGkvc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fQ7S2J9RKi0EnPZ2m8LZsihHS3YcRlQDwClyKm+KWr1ALGks2NCZ4SfTXSXDOMsak 2OdpPotjCDJySYWY2RQPwUfiz8bzUVVGwSp4GlIElm/8XXlIUmar/EqylubBot9ADM lgF9cTvH+z07ULMiz6Fjk3/kp7SEcx3zEHtTBRUw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5138969B3A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-pci@vger.kernel.org, timur@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , Jonathan Corbet , Bjorn Helgaas , "Paul E. McKenney" , Andrew Morton , Thomas Gleixner , Ingo Molnar , Christoffer Dall , Mimi Zohar , Marc Zyngier , Ding Tianhong , Michal Hocko , linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list) Subject: [PATCH V2 7/7] PCI: make reset poll time adjustable Date: Mon, 27 Nov 2017 01:20:28 -0500 Message-Id: <1511763628-11856-8-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511763628-11856-1-git-send-email-okaya@codeaurora.org> References: <1511763628-11856-1-git-send-email-okaya@codeaurora.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce pci=resetpolltime= argument to override 60 seconds poll time in units of milliseconds. Signed-off-by: Sinan Kaya --- Documentation/admin-guide/kernel-parameters.txt | 2 ++ drivers/pci/pci.c | 13 ++++++++----- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 0549662..a07d4f5 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3071,6 +3071,8 @@ pcie_scan_all Scan all possible PCIe devices. Otherwise we only look for one device below a PCIe downstream port. + resetpolltime= Adjusts the default poll time following hot reset + and D3->D0 transition. pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power Management. diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 8472c24..a6c3e25 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -127,7 +127,7 @@ static int __init pcie_port_pm_setup(char *str) /* time to wait after a reset for device to become responsive */ #define PCIE_RESET_READY_POLL_MS 60000 - +static unsigned long pci_reset_polltime = PCIE_RESET_READY_POLL_MS; /** * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children * @bus: pointer to PCI bus structure to search @@ -3904,7 +3904,7 @@ int pcie_flr(struct pci_dev *dev) */ msleep(100); - return pci_dev_wait(dev, "FLR", PCIE_RESET_READY_POLL_MS); + return pci_dev_wait(dev, "FLR", pci_reset_polltime); } EXPORT_SYMBOL_GPL(pcie_flr); @@ -3945,7 +3945,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe) */ msleep(100); - return pci_dev_wait(dev, "AF_FLR", PCIE_RESET_READY_POLL_MS); + return pci_dev_wait(dev, "AF_FLR", pci_reset_polltime); } /** @@ -3990,7 +3990,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); pci_dev_d3_sleep(dev); - return pci_dev_wait(dev, "PM D3->D0", PCIE_RESET_READY_POLL_MS); + return pci_dev_wait(dev, "PM D3->D0", pci_reset_polltime); } void pci_reset_secondary_bus(struct pci_dev *dev) @@ -4035,7 +4035,7 @@ int pci_reset_bridge_secondary_bus(struct pci_dev *dev) { pcibios_reset_secondary_bus(dev); - return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS); + return pci_dev_wait(dev, "bus reset", pci_reset_polltime); } EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus); @@ -5528,6 +5528,9 @@ static int __init pci_setup(char *str) pcie_bus_config = PCIE_BUS_PEER2PEER; } else if (!strncmp(str, "pcie_scan_all", 13)) { pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS); + } else if (!strncmp(str, "resetpolltime=", 14)) { + pci_reset_polltime = + simple_strtoul(str + 14, &str, 0); } else { printk(KERN_ERR "PCI: Unknown option `%s'\n", str);