From patchwork Thu Dec 21 02:11:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Honghui Zhang X-Patchwork-Id: 10126897 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5B8B360388 for ; Thu, 21 Dec 2017 02:11:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4AE8429A8A for ; Thu, 21 Dec 2017 02:11:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3EED429A87; Thu, 21 Dec 2017 02:11:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACEE029A91 for ; Thu, 21 Dec 2017 02:11:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756192AbdLUCLY (ORCPT ); Wed, 20 Dec 2017 21:11:24 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:56711 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1755834AbdLUCLX (ORCPT ); Wed, 20 Dec 2017 21:11:23 -0500 X-UUID: b660eb6e6a8a4b70884b01be74306411-20171221 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 588323479; Thu, 21 Dec 2017 10:11:21 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 21 Dec 2017 10:11:21 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 21 Dec 2017 10:11:20 +0800 From: To: , , , , , , , , , , CC: , , , , , , Subject: [PATCH v2 1/2] PCI: mediatek: Clear IRQ status after IRQ dispatched to avoid reentry Date: Thu, 21 Dec 2017 10:11:16 +0800 Message-ID: <1513822277-18329-2-git-send-email-honghui.zhang@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1513822277-18329-1-git-send-email-honghui.zhang@mediatek.com> References: <1513822277-18329-1-git-send-email-honghui.zhang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Honghui Zhang There maybe a same IRQ reentry scenario after IRQ received in current IRQ handle flow: EP device PCIe host driver EP driver 1. issue an IRQ 2. received IRQ 3. clear IRQ status 4. dispatch IRQ 5. clear IRQ source The IRQ status was not successfully cleared at step 2 since the IRQ source was not cleared yet. So the PCIe host driver may receive the same IRQ after step 5. Then there's an IRQ reentry occurred. Even worse, if the reentry IRQ was not an IRQ that EP driver expected, it may not handle the IRQ. Then we may run into the infinite loop from step 2 to step 4. Clear the IRQ status after IRQ have been dispatched to avoid the IRQ reentry. Signed-off-by: Honghui Zhang Acked-by: Ryder Lee --- drivers/pci/host/pcie-mediatek.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/host/pcie-mediatek.c b/drivers/pci/host/pcie-mediatek.c index db93efd..3248771 100644 --- a/drivers/pci/host/pcie-mediatek.c +++ b/drivers/pci/host/pcie-mediatek.c @@ -605,11 +605,11 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data) while ((status = readl(port->base + PCIE_INT_STATUS)) & INTX_MASK) { for_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) { - /* Clear the INTx */ - writel(1 << bit, port->base + PCIE_INT_STATUS); virq = irq_find_mapping(port->irq_domain, bit - INTX_SHIFT); generic_handle_irq(virq); + /* Clear the INTx */ + writel(1 << bit, port->base + PCIE_INT_STATUS); } } @@ -619,10 +619,10 @@ static irqreturn_t mtk_pcie_intr_handler(int irq, void *data) while ((imsi_status = readl(port->base + PCIE_IMSI_STATUS))) { for_each_set_bit(bit, &imsi_status, MTK_MSI_IRQS_NUM) { - /* Clear the MSI */ - writel(1 << bit, port->base + PCIE_IMSI_STATUS); virq = irq_find_mapping(port->msi_domain, bit); generic_handle_irq(virq); + /* Clear the MSI */ + writel(1 << bit, port->base + PCIE_IMSI_STATUS); } } /* Clear MSI interrupt status */