From patchwork Thu Jan 4 15:48:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Koen Vandeputte X-Patchwork-Id: 10144987 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 703BD60329 for ; Thu, 4 Jan 2018 15:48:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 64618286B2 for ; Thu, 4 Jan 2018 15:48:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 590A928759; Thu, 4 Jan 2018 15:48:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9BB95286B2 for ; Thu, 4 Jan 2018 15:48:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753391AbeADPsL (ORCPT ); Thu, 4 Jan 2018 10:48:11 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:44797 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753314AbeADPsJ (ORCPT ); Thu, 4 Jan 2018 10:48:09 -0500 Received: by mail-wm0-f65.google.com with SMTP id t8so4263383wmc.3 for ; Thu, 04 Jan 2018 07:48:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ncentric.com; s=google; h=from:to:cc:subject:date:message-id; bh=K1UuWFYWz6Do3VSTslI4zUwsHrjx4v/0ra758qyWJ7w=; b=P4bfcbTmVV0zxNCKHGfsax9FTroPhh1CA+JGhFCXiWuYXvukWjMpMmK4ig4MM9Dd92 q28EauCfIHCjgq/qIMNUFllvtanLPqIkv30mHQjPrY6BdRkCQJjx15/V61RkuU8GJXeQ whRFvHSqEui2nVeM3EoOIgR1QX2IOsnxwcJWI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=K1UuWFYWz6Do3VSTslI4zUwsHrjx4v/0ra758qyWJ7w=; b=oOfOG0DFpxT0KcyvXtXo+FIdfyRsRO9ZFxl1bAOOHb+VWQ1tzz3R6p4QeR6LtS7bFt CKrznrUsZqfkuIeDs2lZw+dPrOgtOMXzK0feuv7B1vDiKgo1Ox0zgiRHDwvGR3BOCvSl JxeXky1getlJrfitSGY+vHG8hELx8v3yZHwBFLjhyrFEeSoh6lTJFoiIHso9Nb1qPo3E 1dEIAIJfWhhfVzBtBu+Oc0Jk7l5wq9+K8IK9iU9ullf6+6GndCbKYNK07phINU/qzdS/ 0m0szY8cJ5eCeJu3HRAOPFDl3p5mGEZ/Ziq91JaNSdq6eyrIhgVIHZsUIViTMAVHlkVw Dh8A== X-Gm-Message-State: AKGB3mKHCJxbZx41UjDcW5JfehrsWzAOZuHztxsRbpKWg82CWk/l0VKR I0/myJ59cqNgFxY4V/t4VDi2jAHNaLg= X-Google-Smtp-Source: ACJfBovQJ+43lQhiYJ7NJXAdPOmGSQ/wRYvenqO1GhaBsDNC/NP+aIH3Q/uZyPjPoQF6wkXmxvAzng== X-Received: by 10.80.179.137 with SMTP id s9mr8042079edd.164.1515080887332; Thu, 04 Jan 2018 07:48:07 -0800 (PST) Received: from localhost.localdomain (d515300d8.static.telenet.be. [81.83.0.216]) by smtp.googlemail.com with ESMTPSA id a38sm2319781edf.3.2018.01.04.07.48.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 04 Jan 2018 07:48:06 -0800 (PST) From: Koen Vandeputte To: linux-pci@vger.kernel.org Cc: bhelgaas@google.com, Koen Vandeputte Subject: [PATCH] imx6: fix pcie enumeration Date: Thu, 4 Jan 2018 16:48:03 +0100 Message-Id: <1515080883-30066-1-git-send-email-koen.vandeputte@ncentric.com> X-Mailer: git-send-email 2.7.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP By default, when the imx6 PCIe RC boots up, the subordinate is set equally to the secondary bus (1), and does not alter afterwards. This means that theoretically, the highest bus reachable downstream is bus 1. Before commit a20c7f36bd3d ("PCI: Do not allocate more buses than available in parent"), the driver ignored the subord value and just allowed up to 0xff on each device downstream. This caused a lot of errors to be printed, as this is not logical according to spec. (but it worked ..) After this commit, the driver stopped scanning deeper when the last allocated busnr equals the subordinate of it's master, causing devices to be undiscovered (especially behind bridges), uncovering the impact of this bug. Before: 00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) (prog-if 00 ... Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 00:00.0 0604: 16c3:abcd (rev 01) 01:00.0 0604: 10b5:8604 (rev ba) ... stops after bus 1 ... After: 00:00.0 PCI bridge: Synopsys, Inc. Device abcd (rev 01) (prog-if 00 ... Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0 00:00.0 0604: 16c3:abcd (rev 01) 01:00.0 0604: 10b5:8604 (rev ba) 02:01.0 0604: 10b5:8604 (rev ba) 02:04.0 0604: 10b5:8604 (rev ba) 02:05.0 0604: 10b5:8604 (rev ba) 03:00.0 0280: 168c:0033 (rev 01) 05:00.0 0280: 168c:0033 (rev 01) Signed-off-by: Koen Vandeputte --- Needs backports to 4.14 & 4.9 stables drivers/pci/dwc/pci-imx6.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c index b73483534a5b..3d13fa8c2eb1 100644 --- a/drivers/pci/dwc/pci-imx6.c +++ b/drivers/pci/dwc/pci-imx6.c @@ -76,6 +76,9 @@ struct imx6_pcie { #define PCIE_RC_LCSR 0x80 +#define PCIE_RC_BNR 0x18 +#define PCIE_RC_BNR_MAX_SUBORDINATE (0xff << 16) + /* PCIe Port Logic registers (memory-mapped) */ #define PL_OFFSET 0x700 #define PCIE_PL_PFLR (PL_OFFSET + 0x08) @@ -562,6 +565,17 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) int ret; /* + * By default, the subordinate is set equally to the secondary + * bus (0x01) when the RC boots. + * This means that theoretically, only bus 1 is reachable from the RC. + * Force the PCIe RC subordinate to 0xff, otherwise no downstream + * devices will be detected behind bus 1. + */ + tmp = dw_pcie_readl_rc(pp, PCIE_RC_BNR); + tmp |= PCIE_RC_BNR_MAX_SUBORDINATE; + dw_pcie_writel_rc(pp, PCIE_RC_BNR, tmp); + + /* * Force Gen1 operation when starting the link. In case the link is * started in Gen2 mode, there is a possibility the devices on the * bus will not be detected at all. This happens with PCIe switches.