From patchwork Sun Mar 11 11:19:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Gilboa X-Patchwork-Id: 10274685 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 715736057F for ; Sun, 11 Mar 2018 12:00:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5F4C12875F for ; Sun, 11 Mar 2018 12:00:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 53B7428E6A; Sun, 11 Mar 2018 12:00:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EF0EB2876C for ; Sun, 11 Mar 2018 12:00:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932217AbeCKMAr (ORCPT ); Sun, 11 Mar 2018 08:00:47 -0400 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:54463 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932126AbeCKMAq (ORCPT ); Sun, 11 Mar 2018 08:00:46 -0400 Received: from Internal Mail-Server by MTLPINE1 (envelope-from talgi@mellanox.com) with ESMTPS (AES256-SHA encrypted); 11 Mar 2018 13:20:40 +0200 Received: from gen-l-vrt-178.mtl.labs.mlnx (gen-l-vrt-178.mtl.labs.mlnx [10.137.178.1]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w2BBK6o8002862; Sun, 11 Mar 2018 13:20:06 +0200 Received: from gen-l-vrt-178.mtl.labs.mlnx (localhost [127.0.0.1]) by gen-l-vrt-178.mtl.labs.mlnx (8.14.7/8.14.7) with ESMTP id w2BBK5ub011191; Sun, 11 Mar 2018 13:20:05 +0200 Received: (from talgi@localhost) by gen-l-vrt-178.mtl.labs.mlnx (8.14.7/8.14.7/Submit) id w2BBK5lg011190; Sun, 11 Mar 2018 13:20:05 +0200 From: Tal Gilboa To: Bjorn Helgaas Cc: Linux PCI , Tariq Toukan , Tal Gilboa Subject: [PATCH next V2 2/5] PCI: Add a query function for PCI device's width cap Date: Sun, 11 Mar 2018 13:19:30 +0200 Message-Id: <1520767173-11090-3-git-send-email-talgi@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1520767173-11090-1-git-send-email-talgi@mellanox.com> References: <1520767173-11090-1-git-send-email-talgi@mellanox.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP pcie_get_width_cap() implements the logic for querying a PCI device's maximum width capability. Change max_link_width_show() function to use pcie_get_width_cap(). Signed-off-by: Tal Gilboa --- drivers/pci/pci-sysfs.c | 6 +++--- drivers/pci/pci.c | 23 +++++++++++++++++++++++ include/linux/pci.h | 1 + 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index c8b4854..ae30ba2 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -177,14 +177,14 @@ static ssize_t max_link_width_show(struct device *dev, struct device_attribute *attr, char *buf) { struct pci_dev *pci_dev = to_pci_dev(dev); - u32 linkcap; + enum pcie_link_width width; int err; - err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); + err = pcie_get_width_cap(pci_dev, &width); if (err) return -EINVAL; - return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4); + return sprintf(buf, "%u\n", width); } static DEVICE_ATTR_RO(max_link_width); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 7620cc9..48b9fd6 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5206,6 +5206,29 @@ int pcie_get_speed_cap(struct pci_dev *dev, enum pci_bus_speed *speed) EXPORT_SYMBOL(pcie_get_speed_cap); /** + * pcie_get_width_cap - queries for the PCI device's link width capability. + * @dev: PCI device to query + * @width: storage for link width + * + * This function queries the PCI device width capability. + */ +int pcie_get_width_cap(struct pci_dev *dev, enum pcie_link_width *width) +{ + u32 lnkcap; + int err; + + *width = PCIE_LNK_WIDTH_UNKNOWN; + + err = pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap); + if (!err && lnkcap) + /* Shift start of width mask by 4 to get actual speed cap */ + *width = (lnkcap & PCI_EXP_LNKCAP_MLW) >> 4; + + return err; +} +EXPORT_SYMBOL(pcie_get_width_cap); + +/** * pci_select_bars - Make BAR mask from the type of resource * @dev: the PCI device for which BAR mask is made * @flags: resource type mask to be selected diff --git a/include/linux/pci.h b/include/linux/pci.h index 54443e4..8242d3d 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1084,6 +1084,7 @@ static inline int pci_is_managed(struct pci_dev *pdev) int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, enum pcie_link_width *width); int pcie_get_speed_cap(struct pci_dev *dev, enum pci_bus_speed *speed); +int pcie_get_width_cap(struct pci_dev *dev, enum pcie_link_width *width); int pcie_flr(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev);