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Fri, 10 Aug 2018 08:45:16 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1fo9bD-0006uk-3P; Fri, 10 Aug 2018 08:45:11 -0700 Received: from xsj-pvapsmtp01 (xsj-pvapsmtp01.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id w7AFj8Aw007910; Fri, 10 Aug 2018 08:45:08 -0700 Received: from [172.23.37.224] (helo=xhdbharatku40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1fo9b9-0006kA-GA; Fri, 10 Aug 2018 08:45:07 -0700 From: Bharat Kumar Gogada To: , CC: , , Bharat Kumar Gogada Subject: [PATCH 4/4] PCI: xilinx-nwl: Add method to setup_platform_service_irq hook Date: Fri, 10 Aug 2018 21:09:40 +0530 Message-ID: <1533915580-31805-5-git-send-email-bharat.kumar.gogada@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533915580-31805-1-git-send-email-bharat.kumar.gogada@xilinx.com> References: <1533915580-31805-1-git-send-email-bharat.kumar.gogada@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(136003)(396003)(346002)(39860400002)(376002)(2980300002)(438002)(199004)(189003)(107886003)(50466002)(305945005)(36756003)(47776003)(486006)(77096007)(26005)(126002)(2616005)(476003)(4326008)(186003)(2906002)(11346002)(106466001)(51416003)(76176011)(7696005)(336012)(446003)(63266004)(426003)(478600001)(48376002)(110136005)(16586007)(356003)(54906003)(81156014)(8676002)(81166006)(106002)(316002)(36386004)(5660300001)(50226002)(9786002)(8936002)(6666003)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:SN4PR0201MB3518;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; 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Signed-off-by: Bharat Kumar Gogada --- drivers/pci/controller/pcie-xilinx-nwl.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index fb32840..285647b 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -22,6 +22,7 @@ #include #include "../pci.h" +#include "../pcie/portdrv.h" /* Bridge core config registers */ #define BRCFG_PCIE_RX0 0x00000000 @@ -819,6 +820,20 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie, return 0; } +int nwl_setup_service_irqs(struct pci_host_bridge *bridge, int *irqs, + int plat_mask) +{ + struct nwl_pcie *pcie; + + pcie = pci_host_bridge_priv(bridge); + if (plat_mask & PCIE_PORT_SERVICE_AER) { + irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pcie->irq_misc; + plat_mask &= ~(1 << PCIE_PORT_SERVICE_AER_SHIFT); + } + + return plat_mask; +} + static const struct of_device_id nwl_pcie_of_match[] = { { .compatible = "xlnx,nwl-pcie-2.11", }, {} @@ -880,6 +895,7 @@ static int nwl_pcie_probe(struct platform_device *pdev) bridge->ops = &nwl_pcie_ops; bridge->map_irq = of_irq_parse_and_map_pci; bridge->swizzle_irq = pci_common_swizzle; + bridge->setup_platform_service_irq = nwl_setup_service_irqs; if (IS_ENABLED(CONFIG_PCI_MSI)) { err = nwl_pcie_enable_msi(pcie);