From patchwork Tue Nov 6 21:52:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 10671513 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F1AB15A6 for ; Tue, 6 Nov 2018 21:52:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2D6BB2AD4F for ; Tue, 6 Nov 2018 21:52:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 21ABA2AD58; Tue, 6 Nov 2018 21:52:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B9FB72ADCD for ; Tue, 6 Nov 2018 21:52:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730731AbeKGHTw (ORCPT ); Wed, 7 Nov 2018 02:19:52 -0500 Received: from mail.kernel.org ([198.145.29.99]:40818 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726069AbeKGHTv (ORCPT ); Wed, 7 Nov 2018 02:19:51 -0500 Received: from localhost (unknown [69.71.4.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 707572083D; Tue, 6 Nov 2018 21:52:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1541541152; bh=vpT1/ROwhYEut9Vg+7lXeVffTQuCJHKjwLeUwR/9PV0=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=L9UpPl6znyVSkEqw3PmyihLXZqqZ/tjmZR+gqC1Oe3RdNIYXjjlX3ctrcRXDRJfEC K4cBLfL7ZJDhNTtButERe1aA8pFAwYS6tZoAZJtR+/kd7x0IU+irItVblIt+H14Dzi /an27nvOfNZFEBbVBjuPbeRVJJShZUZc+uFvrftQ= Subject: [PATCH 1/2] lspci: Decode Multicast Extended Capability From: Bjorn Helgaas To: Martin Mares Cc: linux-pci@vger.kernel.org Date: Tue, 06 Nov 2018 15:52:31 -0600 Message-ID: <154154115111.78911.820638647771761075.stgit@bhelgaas-glaptop.roam.corp.google.com> In-Reply-To: <154154102296.78911.760432131801074864.stgit@bhelgaas-glaptop.roam.corp.google.com> References: <154154102296.78911.760432131801074864.stgit@bhelgaas-glaptop.roam.corp.google.com> User-Agent: StGit/0.18 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bjorn Helgaas Decode the Multicast Extended Capability described in PCIe r4.0, sec 7.9.11. Signed-off-by: Bjorn Helgaas --- lib/header.h | 18 ++++ ls-ecaps.c | 59 ++++++++++++ tests/cap-multicast | 257 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 334 insertions(+) create mode 100644 tests/cap-multicast diff --git a/lib/header.h b/lib/header.h index d785473..b563073 100644 --- a/lib/header.h +++ b/lib/header.h @@ -1095,6 +1095,24 @@ #define PCI_IOV_MSA_BIR(x) ((x) & 7) /* VF Migration State BIR */ #define PCI_IOV_MSA_OFFSET(x) ((x) & 0xfffffff8) /* VF Migration State Offset */ +/* Multicast */ +#define PCI_MCAST_CAP 0x04 /* Multicast Capability */ +#define PCI_MCAST_CAP_MAX_GROUP(x) ((x) & 0x3f) +#define PCI_MCAST_CAP_WIN_SIZE(x) (((x) >> 8) & 0x3f) +#define PCI_MCAST_CAP_ECRC 0x8000 /* ECRC Regeneration Supported */ +#define PCI_MCAST_CTRL 0x06 /* Multicast Control */ +#define PCI_MCAST_CTRL_NUM_GROUP(x) ((x) & 0x3f) +#define PCI_MCAST_CTRL_ENABLE 0x8000 /* MC Enabled */ +#define PCI_MCAST_BAR 0x08 /* Base Address */ +#define PCI_MCAST_BAR_INDEX_POS(x) ((u32) ((x) & 0x3f)) +#define PCI_MCAST_BAR_MASK (~0xfffUL) +#define PCI_MCAST_RCV 0x10 /* Receive */ +#define PCI_MCAST_BLOCK 0x18 /* Block All */ +#define PCI_MCAST_BLOCK_UNTRANS 0x20 /* Block Untranslated */ +#define PCI_MCAST_OVL_BAR 0x28 /* Overlay BAR */ +#define PCI_MCAST_OVL_SIZE(x) ((u32) ((x) & 0x3f)) +#define PCI_MCAST_OVL_MASK (~0x3fUL) + /* Page Request Interface */ #define PCI_PRI_CTRL 0x04 /* PRI Control Register */ #define PCI_PRI_CTRL_ENABLE 0x01 /* Enable */ diff --git a/ls-ecaps.c b/ls-ecaps.c index 5505948..3deb535 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -396,6 +396,62 @@ cap_sriov(struct device *d, int where) PCI_IOV_MSA_BIR(l)); } +static void +cap_multicast(struct device *d, int where, int type) +{ + u16 w; + u32 l; + u64 bar, rcv, block; + + printf("Multicast\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where + PCI_MCAST_CAP, 0x30)) + return; + + w = get_conf_word(d, where + PCI_MCAST_CAP); + printf("\t\tMcastCap: MaxGroups %d", PCI_MCAST_CAP_MAX_GROUP(w) + 1); + if (type == PCI_EXP_TYPE_ENDPOINT || type == PCI_EXP_TYPE_ROOT_INT_EP) + printf(", WindowSz %d (%d bytes)", + PCI_MCAST_CAP_WIN_SIZE(w), 1 << PCI_MCAST_CAP_WIN_SIZE(w)); + if (type == PCI_EXP_TYPE_ROOT_PORT || + type == PCI_EXP_TYPE_UPSTREAM || type == PCI_EXP_TYPE_DOWNSTREAM) + printf(", ECRCRegen%c\n", FLAG(w, PCI_MCAST_CAP_ECRC)); + w = get_conf_word(d, where + PCI_MCAST_CTRL); + printf("\t\tMcastCtl: NumGroups %d, Enable%c\n", + PCI_MCAST_CTRL_NUM_GROUP(w) + 1, FLAG(w, PCI_MCAST_CTRL_ENABLE)); + bar = get_conf_long(d, where + PCI_MCAST_BAR); + l = get_conf_long(d, where + PCI_MCAST_BAR + 4); + bar |= (u64) l << 32; + printf("\t\tMcastBAR: IndexPos %d, BaseAddr %016" PCI_U64_FMT_X "\n", + PCI_MCAST_BAR_INDEX_POS(bar), bar & PCI_MCAST_BAR_MASK); + rcv = get_conf_long(d, where + PCI_MCAST_RCV); + l = get_conf_long(d, where + PCI_MCAST_RCV + 4); + rcv |= (u64) l << 32; + printf("\t\tMcastReceiveVec: %016" PCI_U64_FMT_X "\n", rcv); + block = get_conf_long(d, where + PCI_MCAST_BLOCK); + l = get_conf_long(d, where + PCI_MCAST_BLOCK + 4); + block |= (u64) l << 32; + printf("\t\tMcastBlockAllVec: %016" PCI_U64_FMT_X "\n", block); + block = get_conf_long(d, where + PCI_MCAST_BLOCK_UNTRANS); + l = get_conf_long(d, where + PCI_MCAST_BLOCK_UNTRANS + 4); + block |= (u64) l << 32; + printf("\t\tMcastBlockUntransVec: %016" PCI_U64_FMT_X "\n", block); + + if (type == PCI_EXP_TYPE_ENDPOINT || type == PCI_EXP_TYPE_ROOT_INT_EP) + return; + bar = get_conf_long(d, where + PCI_MCAST_OVL_BAR); + l = get_conf_long(d, where + PCI_MCAST_OVL_BAR + 4); + bar |= (u64) l << 32; + printf("\t\tMcastOverlayBAR: OverlaySize %d ", PCI_MCAST_OVL_SIZE(bar)); + if (PCI_MCAST_OVL_SIZE(bar) >= 6) + printf("(%d bytes)", 1 << PCI_MCAST_OVL_SIZE(bar)); + else + printf("(disabled)"); + printf(", BaseAddr %016" PCI_U64_FMT_X "\n", bar & PCI_MCAST_OVL_MASK); +} + static void cap_vc(struct device *d, int where) { @@ -789,6 +845,9 @@ show_ext_caps(struct device *d, int type) case PCI_EXT_CAP_ID_MRIOV: printf("Multi-Root I/O Virtualization \n"); break; + case PCI_EXT_CAP_ID_MCAST: + cap_multicast(d, where, type); + break; case PCI_EXT_CAP_ID_PRI: cap_pri(d, where); break; diff --git a/tests/cap-multicast b/tests/cap-multicast new file mode 100644 index 0000000..3fd2c31 --- /dev/null +++ b/tests/cap-multicast @@ -0,0 +1,257 @@ +07:00.0 PCI bridge: PLX Technology, Inc. Device 8796 (rev ab) +00: b5 10 96 87 07 01 10 48 ab 00 04 06 08 00 01 00 +10: 00 00 10 c7 00 00 00 00 07 08 13 00 f1 01 00 00 +20: 00 c2 00 c7 01 00 f1 01 e0 2f 00 00 fc 2f 00 00 +30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 12 00 +40: 01 48 03 c8 08 00 00 00 05 68 86 01 00 00 00 00 +50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +60: 00 00 00 00 00 00 00 00 10 a4 52 00 04 80 00 00 +70: 20 08 0b 00 03 69 41 00 00 00 03 01 00 00 00 00 +80: 00 00 00 00 00 00 00 00 00 00 00 00 40 08 04 00 +90: 00 00 00 00 0e 01 00 00 03 00 1e 00 00 00 00 00 +a0: 00 00 00 00 0d 00 00 00 e0 1a 31 00 00 00 00 00 +b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +100: 03 00 41 fb 00 0e df b5 10 00 87 ab 19 00 81 14 +110: 01 00 00 00 00 00 00 00 55 55 55 55 55 55 55 55 +120: 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 +130: 55 55 55 55 55 55 55 55 04 00 c1 10 00 00 00 00 +140: 00 00 00 00 01 00 00 00 02 00 01 e0 00 0c 00 00 +150: 00 00 00 00 00 00 00 00 04 00 00 03 01 00 04 80 +160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +170: 00 00 00 00 00 00 00 00 00 04 08 0c 10 14 1f 1f +180: 00 1f 08 0c 1f 1f 1f 1f 00 1f 08 0c 1f 1f 1f 1f +190: 00 1f 08 0c 1f 1f 1f 1f 00 1f 08 0c 1f 1f 1f 1f +1a0: 00 1f 08 0c 1f 1f 1f 1f 00 1f 08 0c 1f 1f 1f 1f +1b0: 00 1f 08 0c 1f 1f 1f 1f 00 00 00 00 00 00 00 00 +1c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1d0: 00 00 00 00 00 00 00 00 00 00 00 00 07 00 00 00 +1e0: 02 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +1f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +200: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +210: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +220: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +240: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 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